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LC78816 bảng dữ liệu(PDF) 4 Page - Sanyo Semicon Device |
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LC78816 bảng dữ liệu(HTML) 4 Page - Sanyo Semicon Device |
4 / 11 page No. 4250-4/11 LC78816MB, 78816MC Block Diagram Pin No. Pin Name Function and Operational Description 1 CH1OUT Channel 1 output pin (left channel) 2 REFH Reference voltage high level pin Normally connected to AGND through a capacitor. 3 VrefH Reference voltage high level input pin 4 AVDD Analog system power supply voltage pin 5 LRCK/WCLK LR clock and word clock input pin Used to generate the internal signal that latches the digital audio data (DATAL and DATAR). Digital audio data input pin 6 DATAL Data is input from the MSB bit serially. When FSEL is low, channel 1 data is input. When FSEL is high, channel 1 and channel 2 data are input using time division. Digital audio data input pin 7 DATAR Data is input from the MSB bit serially. When FSEL is low, channel 2 data is input. When FSEL is high, functions as the interface switching pin. Bit clock input pin 8 BCLK This is the clock for reading in digital audio data bit serially. Also functions as the IC’s system clock when SYSCLK is fixed low or high. System clock input pin 9 SYSCLK This is the system clock that drives the IC. However, in certain modes it is used as the interface switching pin. (See the timing charts.) 10 DVDD Digital system power supply voltage pin 11 TSTOUT Output pin for IC testing 12 FSEL When low, digital audio data is input simultaneously from the DATAL and DATAR pins. When high, digital audio data is input from the DATAL pin in time division mode. 13 MODE1 Interface switching pins. (See the timing charts.) 14 MODE2 15 DGND Digital system ground pin 16 REFL Reference voltage low level pin. Normally connected to AGND through a capacitor. 17 AGND Analog system ground pin 18 VrefL Reference voltage low level input pin 19 NC No connection 20 CH2OUT Channel 2 output pin (right channel) Pin Functions |
Số phần tương tự - LC78816 |
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Mô tả tương tự - LC78816 |
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