SI1001-C-GM datasheet(10/376 Pages) SILABS

tên linh kiện	SI1001-C-GM

Giải thích chi tiết về linh kiện	Ultra Low Power, 64/32 kB, 10-Bit ADC MCU with Integrated 240-960 MHz EZRadioPRO Transceiver

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nhà sản xuất	SILABS [Silicon Laboratories]

Trang chủ	http://www.silabs.com

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Si1000/1/2/3/4/5

10

Rev. 1.0

List of Figures

Figure 1.1. Si1000 Block Diagram ........................................................................... 17

Figure 1.2. Si1001 Block Diagram ........................................................................... 17

Figure 1.3. Si1002 Block Diagram ........................................................................... 18

Figure 1.4. Si1003 Block Diagram ........................................................................... 18

Figure 1.5. Si1004 Block Diagram ........................................................................... 19

Figure 1.6. Si1005 Block Diagram ........................................................................... 19

Figure 1.7. Si1002/3 RX/TX Direct-tie Application Example .................................... 20

Figure 1.8. Si1000/1 Antenna Diversity Application Example ................................. 20

Figure 1.9. Port I/O Functional Block Diagram ........................................................ 22

Figure 1.10. PCA Block Diagram ............................................................................. 23

Figure 1.11. ADC0 Functional Block Diagram ......................................................... 24

Figure 1.12. ADC0 Multiplexer Block Diagram ........................................................ 25

Figure 1.13. Comparator 0 Functional Block Diagram ............................................ 26

Figure 1.14. Comparator 1 Functional Block Diagram ............................................ 26

Figure 3.1. Si1000/1/2/3 Pinout Diagram (Top View) .............................................. 32

Figure 3.2. Si1004/5 Pinout Diagram (Top View) .................................................... 33

Figure 3.3. QFN-42 Package Drawing .................................................................... 34

Figure 3.4. Typical QFN-42 Landing Diagram ......................................................... 36

Figure 3.5. VIA Placement and Keepout Region ..................................................... 37

Figure 3.6. Typical PCB Stencil Diagram ................................................................ 38

Figure 4.1. Active Mode Current (External CMOS Clock) ....................................... 45

Figure 4.2. Idle Mode Current (External CMOS Clock) ........................................... 46

Figure 4.3. Typical DC-DC Converter Efficiency (High Current, VDD/DC+ = 2 V ... 47

Figure 4.4. Typical DC-DC Converter Efficiency (High Current, VDD/DC+ = 3 V) .. 48

Figure 4.5. Typical DC-DC Converter Efficiency (Low Current, VDD/DC+ = 2 V) ... 49

Figure 4.6. Typical One-Cell Suspend Mode Current .............................................. 50

Figure 4.7. Typical VOH Curves, 1.8–3.6 V ............................................................ 52

Figure 4.8. Typical VOH Curves, 0.9–1.8 V ............................................................ 53

Figure 4.9. Typical VOL Curves, 1.8–3.6 V ............................................................. 54

Figure 4.10. Typical VOL Curves, 1.8–3.6 V ........................................................... 55

Figure 4.11. Typical VOL Curves, 0.9–1.8 V ........................................................... 56

Figure 5.1. ADC0 Functional Block Diagram ........................................................... 74

Figure 5.2. 10-Bit ADC Track and Conversion Example Timing (BURSTEN = 0) ... 77

Figure 5.3. Burst Mode Tracking Example with Repeat Count Set to 4 .................. 78

Figure 5.4. ADC0 Equivalent Input Circuits ............................................................. 79

Figure 5.5. ADC Window Compare Example: Right-Justified Single-Ended Data .. 89

Figure 5.6. ADC Window Compare Example: Left-Justified Single-Ended Data ..... 89

Figure 5.7. ADC0 Multiplexer Block Diagram .......................................................... 90

Figure 5.8. Temperature Sensor Transfer Function ................................................ 92

Figure 5.9. Temperature Sensor Error with 1-Point Calibration (VREF = 1.68 V) .... 93

Figure 5.10. Voltage Reference Functional Block Diagram ..................................... 95

Figure 7.1. Comparator 0 Functional Block Diagram .............................................. 99

Figure 7.2. Comparator 1 Functional Block Diagram ............................................ 100

Số phần tương tự - SI1001-C-GM

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Silicon Laboratories	Si1001-E-GM	99Kb / 2P	Silicon Labs is pleased to announce Revision 1.2 of the Si100x datasheet
Silicon Laboratories	Si1001-E-GM2	2Mb / 382P	MCU with Integrated 240??60 MHz EZRadioPRO짰 Transceiver

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Mô tả tương tự - SI1001-C-GM

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