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ISL12025IVZ bảng dữ liệu(PDF) 2 Page - Intersil Corporation

tên linh kiện ISL12025IVZ
Giải thích chi tiết về linh kiện  Real-Time Clock/Calendar with I2C Bus and EEPROM
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nhà sản xuất  INTERSIL [Intersil Corporation]
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2
FN6371.1
October 18, 2006
Block Diagram
X1
X2
Oscillator
Frequency
Timer
Logic
Divider
Calendar
8
Control/
Registers
1Hz
Time
Keeping
Registers
Alarm Regs
Compare
RESET
Control
Decode
Logic
Alarm
(EEPROM)
(EEPROM)
SCL
SDA
Serial
Interface
Decoder
4k
EEPROM
ARRAY
Watchdog
Timer
Low Voltage
Reset
Registers
Status
(SRAM)
VDD
VBAT
32.768kHz
(SRAM)
Battery
Circuitry
Switch
OSC Compensation
Pin Descriptions
PIN NUMBER
SYMBOL
BRIEF DESCRIPTION
SOIC
TSSOP
1
3
X1
The X1 pin is the input of an inverting amplifier and is intended to be connected to one pin of an external
32.768kHz quartz crystal. X1 can also be driven directly from a 32.768kHz source.
2
4
X2
The X2 pin is the output of an inverting amplifier and is intended to be connected to one pin of an external
32.768kHz quartz crystal.
3
5
RESET
RESET. This is a reset signal output. This signal notifies a host processor that the “watchdog” time period
has expired or that the voltage has dropped below a fixed VTRIP threshold. It is an open drain active LOW
output. Recommended value for the pull-up resistor is 5k
Ω, If unused, connect to ground.
4
6
GND
Ground.
5
7
SDA
Serial Data (SDA) is a bidirectional pin used to transfer serial data into and out of the device. It has an
open drain output and may be wire OR’ed with other open drain or open collector outputs.
6
8
SCL
The Serial Clock (SCL) input is used to clock all serial data into and out of the device. The input buffer on
this pin is always active (not gated).
71
VBAT
This input provides a backup supply voltage to the device. VBAT supplies power to the device in the event
that the VDD supply fails. This pin should be tied to ground if not used.
82
VDD
Power Supply.
ISL12025


Số phần tương tự - ISL12025IVZ

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Renesas Technology Corp
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Mô tả tương tự - ISL12025IVZ

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