4

FN6667.4

February 11, 2010

Pin Configuration

ISL12020M

(20 LD DFN)

TOP VIEW

X2

X2

X2

X2

X2

X1

X1

X1

X1

X1

NC

NC

GND

NC

IRQ

SCL

NC

SDA

19

18

17

20

16

15

14

13

12

11

2

3

4

1

5

6

7

8

9

10

Pin Descriptions

PIN

NUMBER

SYMBOL

DESCRIPTION

1, 2, 3, 4, 5

16, 17, 18,

19, 20

X2

X1

Crystal Connection. The X1 and X2 pins are the input and output, respectively, of an inverting

amplifier and are also connected to the internal 32.768kHz quartz crystal, which is the timebase for

the real time clock. Compensation circuitry with an internal temperature sensor provides frequency

correction to ±5ppm over the operating temperature range from -40°C to +85°C. The X1 and X2 pins

are not to be connected to any other circuitry or power voltages, and are best left floating. Do not

connect in an application circuit, floating electrical connection.

6, 9, 10, 15

NC

No connection. Do not connect to a signal or supply voltage.

Backup Supply. This input provides a backup supply voltage to the device. VBAT supplies power to

the device in the event that the VDD supply fails. This pin can be connected to a battery, a Super

Capacitor or tied to ground if not used. See the Battery Monitor parameter in the “Electrical

Specifications” table “DC Operating Characteristics - RTC” on page 5.

11

SDA

Serial Data. SDA is a bi-directional pin used to transfer data into and out of the device. It has an

open drain output and may be ORed with other open drain or open collector outputs. The input buffer

is always active (not gated) in normal mode.

An open drain output requires the use of a pull-up resistor. The output circuitry controls the fall time

of the output signal with the use of a slope controlled pull-down. The circuit is designed for 400kHz

is a bi-directional pin used to transfer serial data into and out of the device. It has an open drain

output and may be wire OR’ed with other open drain or open collector outputs.

12

SCL

Serial Clock. The SCL input is used to clock all serial data into and out of the device. The input buffer

on this pin is always active (not gated). It is disabled when the backup power supply on the VBAT pin

is activated to minimize power consumption.

13

out control bits of the control/status register. Multi-functional pin that can be used as interrupt or

frequency output pin. The function is set via the configuration register. The output is open drain and

requires a pull-up resistor.

Interrupt Mode. The pin provides an interrupt signal output. This signal notifies a host processor

that an alarm has occurred and requests action. It is an open drain active low output.

Frequency Output Mode. The pin outputs a clock signal, which is related to the crystal frequency.

14

8

GND

Power supply. Chip power supply and ground pins. The device will operate with a power supply from

ISL12020M