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LMZ12002TZE-ADJ bảng dữ liệu(PDF) 11 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
tên linh kiện LMZ12002TZE-ADJ
Giải thích chi tiết về linh kiện  2A SIMPLE SWITCHER짰 Power Module with 20V Maximum Input Voltage
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General Description
The LMZ12002 SIMPLE SWITCHER® power module is an
easy-to-use step-down DC-DC solution capable of driving up
to 2A load with exceptional power conversion efficiency, line
and load regulation, and output accuracy. The LMZ12002 is
available in an innovative package that enhances thermal
performance and allows for hand or machine soldering.
The LMZ12002 can accept an input voltage rail between 4.5V
and 20V and deliver an adjustable and highly accurate output
voltage as low as 0.8V. The LMZ12002 only requires three
external resistors and four external capacitors to complete the
power solution. The LMZ12002 is a reliable and robust design
with the following protection features: thermal shutdown, in-
put under-voltage lockout, output over-voltage protection,
short-circuit protection, output current limit, and allows startup
into a pre-biased output. A single resistor adjusts the switch-
ing frequency up to 1 MHz.
COT Control Circuit Overview
Constant On Time control is based on a comparator and an
on-time one shot, with the output voltage feedback compared
with an internal 0.8V reference. If the feedback voltage is be-
low the reference, the main MOSFET is turned on for a fixed
on-time determined by a programming resistor R
ON. RON is
connected to V
IN such that on-time is reduced with increasing
input supply voltage. Following this on-time, the main MOS-
FET remains off for a minimum of 260 ns. If the voltage on the
feedback pin falls below the reference level again the on-time
cycle is repeated. Regulation is achieved in this manner.
Design Steps for the LMZ12002
Application
The LMZ12002 is fully supported by Webench® and offers
the following: Component selection, electrical and thermal
simulations as well as the build-it board for a reduction in de-
sign time. The following list of steps can be used to manually
design the LMZ12002 application.
• Select minimum operating V
IN with enable divider resistors
• Program V
O with divider resistor selection
• Program turn-on time with soft-start capacitor selection
• Select C
O
• Select C
IN
• Set operating frequency with R
ON
• Determine module dissipation
• Layout PCB for required thermal performance
ENABLE DIVIDER, R
ENT AND RENB SELECTION
The enable input provides a precise 1.18V band-gap rising
threshold to allow direct logic drive or connection to a voltage
divider from a higher enable voltage such as Vin. The enable
input also incorporates 90 mV (typ) of hysteresis resulting in
a falling threshold of 1.09V. The maximum recommended
voltage into the EN pin is 6.5V. For applications where the
midpoint of the enable divider exceeds 6.5V, a small zener
can be added to limit this voltage.
The function of this resistive divider is to allow the designer to
choose an input voltage below which the circuit will be dis-
abled. This implements the feature of programmable under
voltage lockout. This is often used in battery powered systems
to prevent deep discharge of the system battery. It is also
useful in system designs for sequencing of output rails or to
prevent early turn-on of the supply as the main input voltage
rail rises at power-up. Applying the enable divider to the main
input rail is often done in the case of higher input voltage sys-
tems where a lower boundary of operation should be estab-
lished. In the case of sequencing supplies, the divider is
connected to a rail that becomes active earlier in the power-
up cycle than the LMZ12002 output rail. The two resistors
should be chosen based on the following ratio:
R
ENT / RENB = (VIN UVLO / 1.18V) – 1 (1)
The LMZ12002 demonstration and evaluation boards use
11.8k
Ω for R
ENB and 32.4kΩ for RENT resulting in a rising UV-
LO of 4.5V. This divider presents 5.34V to the EN input when
the divider input is raised to 20V.
The EN pin is internally pulled up to VIN and can be left float-
ing for always-on operation.
OUTPUT VOLTAGE SELECTION
Output voltage is determined by a divider of two resistors
connected between V
O and ground. The midpoint of the di-
vider is connected to the FB input. The voltage at FB is
compared to a 0.8V internal reference. In normal operation
an on-time cycle is initiated when the voltage on the FB pin
falls below 0.8V. The main MOSFET on-time cycle causes the
output voltage to rise and the voltage at the FB to exceed
0.8V. As long as the voltage at FB is above 0.8V, on-time
cycles will not occur.
The regulated output voltage determined by the external di-
vider resistors R
FBT and RFBB is:
V
O = 0.8V * (1 + RFBT / RFBB) (2)
Rearranging terms; the ratio of the feedback resistors for a
desired output voltage is:
R
FBT / RFBB = (VO / 0.8V) - 1 (3)
These resistors should be chosen from values in the range of
1.0 kohm to 10.0 kohm.
For V
O = 0.8V the FB pin can be connected to the output di-
rectly so long as an output preload resistor remains that draws
more than 20uA. Converter operation requires this minimum
load to create a small inductor ripple current and maintain
proper regulation when no load is present.
A feed-forward capacitor is placed in parallel with R
FBT to im-
prove load step transient response. Its value is usually deter-
mined experimentally by load stepping between DCM and
CCM conduction modes and adjusting for best transient re-
sponse and minimum output ripple.
A table of values for R
FBT , RFBB , CFF and RON is included in
the applications schematic.
SOFT-START CAPACITOR SELECTION
Programmable soft-start permits the regulator to slowly ramp
to its steady state operating point after being enabled, thereby
reducing current inrush from the input supply and slowing the
output voltage rise-time to prevent overshoot.
Upon turn-on, after all UVLO conditions have been passed,
an internal 8uA current source begins charging the external
soft-start capacitor. The soft-start time duration to reach
steady state operation is given by the formula:
t
SS = VREF * CSS / Iss = 0.8V * CSS / 8uA (4)
This equation can be rearranged as follows:
C
SS = tSS * 8 μA / 0.8V (5)
Use of a 0.022
μF capacitor results in 2.2 msec soft-start du-
ration. This is recommended as a minimum value.
As the soft-start input exceeds 0.8V the output of the power
stage will be in regulation. The soft-start capacitor continues
11
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