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TL16C2550IRHBR bảng dữ liệu(PDF) 1 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  1.8-V to 5-V DUAL UART WITH 16-BYTE FIFOS
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TL16C2550IRHBR bảng dữ liệu(HTML) 1 Page - Texas Instruments

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FEATURES
APPLICATIONS
DESCRIPTION
TL16C2550
SLWS161D – JUNE 2005 – REVISED OCTOBER 2006
1.8-V to 5-V DUAL UART WITH 16-BYTE FIFOS
False-Start Bit Detection
Programmable Auto-RTS and Auto-CTS
Complete Status Reporting Capabilities
In Auto-CTS Mode, CTS Controls Transmitter
3-State Output TTL Drive Capabilities for
Bidirectional Data Bus and Control Bus
In Auto-RTS Mode, RCV FIFO Contents, and
Threshold Control RTS
Line Break Generation and Detection
Serial and Modem Control Outputs Drive a
Internal Diagnostic Capabilities:
RJ11 Cable Directly When Equipment Is on
– Loopback Controls for Communications
the Same Power Drop
Link Fault Isolation
Capable of Running With All Existing
– Break, Parity, Overrun, and Framing Error
TL16C450 Software
Simulation
After Reset, All Registers Are Identical to the
Fully Prioritized Interrupt System Controls
TL16C450 Register Set
Modem Control Functions (CTS, RTS, DSR,
Up to 24-MHz Clock Rate for up to 1.5-Mbaud
DTR, RI, and DCD)
Operation With VCC = 5 V
Available in 48-Pin TQFP (PFB), 32-Pin QFN
Up to 20-MHz Clock Rate for up to
(RHB), or 44-Pin PLCC (FN)(1) Packages
1.25-Mbaud Operation With VCC = 3.3 V
Pin Compatible with TL16C752B (48-Pin
Up to 16-MHz Clock Rate for up to 1-Mbaud
Package PFB)
Operation With VCC = 2.5 V
(1) Product Preview
Up to 10-MHz Clock Rate for up to 625-kbaud
Operation With VCC = 1.8 V
In the TL16C450 Mode, Hold and Shift
Point-of-Sale Terminals
Registers Eliminate the Need for Precise
Gaming Terminals
Synchronization Between the CPU and Serial
Portable Applications
Data
Router Control
Programmable Baud Rate Generator Allows
Cellular Data
Division of Any Input Reference Clock by 1 to
Factory Automation
(216 - 1) and Generates an Internal 16 × Clock
Standard Asynchronous Communication Bits
(Start, Stop, and Parity) Added to or Deleted
The TL16C2550 is a dual universal asynchronous
From the Serial Data Stream
receiver and transmitter (UART). It incorporates the
5-V, 3.3-V, 2.5-V, and 1.8-V Operation
functionality of two TL16C550D UARTs, each UART
Independent Receiver Clock Input
having its own register set and FIFOs. The two
UARTs share only the data bus interface and clock
Transmit, Receive, Line Status, and Data Set
source,
otherwise
they
operate
independently.
Interrupts Independently Controlled
Another name for the uart function is Asynchronous
Fully Programmable Serial Interface
Communications Element (ACE), and these terms
Characteristics:
will be used interchangeably. The bulk of this
document describes the behavior of each ACE, with
– 5-, 6-, 7-, or 8-Bit Characters
the
understanding
that
two
such
devices
are
– Even-, Odd-, or No-Parity Bit Generation
incorporated into the TL16C2550.
and Detection
– 1-, 1 1/2-, or 2-Stop Bit Generation
– Baud Generation (DC to 1 Mbit/s)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2005–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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