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LM3S9B92-IQR25-C1 bảng dữ liệu(PDF) 3 Page - Texas Instruments |
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LM3S9B92-IQR25-C1 bảng dữ liệu(HTML) 3 Page - Texas Instruments |
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3 / 1279 page  Table of Contents Revision History ............................................................................................................................. 37 About This Document .................................................................................................................... 42 Audience .............................................................................................................................................. 42 About This Manual ................................................................................................................................ 42 Related Documents ............................................................................................................................... 42 Documentation Conventions .................................................................................................................. 43 1 Architectural Overview .......................................................................................... 45 1.1 Functional Overview ...................................................................................................... 47 1.1.1 ARM Cortex™-M3 ......................................................................................................... 47 1.1.2 On-Chip Memory ........................................................................................................... 49 1.1.3 External Peripheral Interface ......................................................................................... 50 1.1.4 Serial Communications Peripherals ................................................................................ 51 1.1.5 System Integration ........................................................................................................ 57 1.1.6 Advanced Motion Control ............................................................................................... 62 1.1.7 Analog .......................................................................................................................... 64 1.1.8 JTAG and ARM Serial Wire Debug ................................................................................ 66 1.1.9 Packaging and Temperature .......................................................................................... 67 1.2 Target Applications ........................................................................................................ 67 1.3 High-Level Block Diagram ............................................................................................. 67 1.4 Additional Features ....................................................................................................... 69 1.4.1 Memory Map ................................................................................................................ 69 1.4.2 Hardware Details .......................................................................................................... 69 2 ARM Cortex-M3 Processor Core ........................................................................... 70 2.1 Block Diagram .............................................................................................................. 71 2.2 Functional Description ................................................................................................... 71 2.2.1 Programming Model ...................................................................................................... 71 2.2.2 Serial Wire and JTAG Debug ......................................................................................... 78 2.2.3 Embedded Trace Macrocell (ETM) ................................................................................. 78 2.2.4 Trace Port Interface Unit (TPIU) ..................................................................................... 78 2.2.5 ROM Table ................................................................................................................... 79 2.2.6 Memory Protection Unit (MPU) ....................................................................................... 79 2.2.7 Nested Vectored Interrupt Controller (NVIC) .................................................................... 79 2.2.8 System Timer (SysTick) ................................................................................................. 80 3 Memory Map ........................................................................................................... 83 4 Interrupts ................................................................................................................. 86 5 JTAG Interface ........................................................................................................ 89 5.1 Block Diagram .............................................................................................................. 90 5.2 Signal Description ......................................................................................................... 90 5.3 Functional Description ................................................................................................... 91 5.3.1 JTAG Interface Pins ...................................................................................................... 91 5.3.2 JTAG TAP Controller ..................................................................................................... 93 5.3.3 Shift Registers .............................................................................................................. 93 5.3.4 Operational Considerations ............................................................................................ 94 5.4 Initialization and Configuration ....................................................................................... 96 3 June 14, 2010 Texas Instruments-Advance Information Stellaris® LM3S9B92 Microcontroller |
Số phần tương tự - LM3S9B92-IQR25-C1 |
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Mô tả tương tự - LM3S9B92-IQR25-C1 |
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