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LM3S9B92-IQR20-C1T bảng dữ liệu(PDF) 4 Page - Texas Instruments |
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LM3S9B92-IQR20-C1T bảng dữ liệu(HTML) 4 Page - Texas Instruments |
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4 / 1279 page  5.5 Register Descriptions .................................................................................................... 97 5.5.1 Instruction Register (IR) ................................................................................................. 97 5.5.2 Data Registers .............................................................................................................. 99 6 System Control ..................................................................................................... 101 6.1 Signal Description ....................................................................................................... 101 6.2 Functional Description ................................................................................................. 101 6.2.1 Device Identification .................................................................................................... 102 6.2.2 Reset Control .............................................................................................................. 102 6.2.3 Non-Maskable Interrupt ............................................................................................... 106 6.2.4 Power Control ............................................................................................................. 107 6.2.5 Clock Control .............................................................................................................. 107 6.2.6 System Control ........................................................................................................... 114 6.3 Initialization and Configuration ..................................................................................... 115 6.4 Register Map .............................................................................................................. 116 6.5 Register Descriptions .................................................................................................. 117 7 Internal Memory ................................................................................................... 209 7.1 Block Diagram ............................................................................................................ 209 7.2 Functional Description ................................................................................................. 209 7.2.1 SRAM ........................................................................................................................ 210 7.2.2 ROM .......................................................................................................................... 210 7.2.3 Flash Memory ............................................................................................................. 212 7.3 Flash Memory Initialization and Configuration ............................................................... 213 7.3.1 Flash Memory Programming ........................................................................................ 213 7.3.2 32-Word Flash Memory Write Buffer ............................................................................. 215 7.3.3 Nonvolatile Register Programming ............................................................................... 215 7.4 Register Map .............................................................................................................. 216 7.5 Flash Memory Register Descriptions (Flash Control Offset) ............................................ 217 7.6 Memory Register Descriptions (System Control Offset) .................................................. 228 8 Micro Direct Memory Access (μDMA) ................................................................ 246 8.1 Block Diagram ............................................................................................................ 247 8.2 Functional Description ................................................................................................. 247 8.2.1 Channel Assignments .................................................................................................. 248 8.2.2 Priority ........................................................................................................................ 249 8.2.3 Arbitration Size ............................................................................................................ 249 8.2.4 Request Types ............................................................................................................ 249 8.2.5 Channel Configuration ................................................................................................. 250 8.2.6 Transfer Modes ........................................................................................................... 252 8.2.7 Transfer Size and Increment ........................................................................................ 260 8.2.8 Peripheral Interface ..................................................................................................... 260 8.2.9 Software Request ........................................................................................................ 260 8.2.10 Interrupts and Errors .................................................................................................... 261 8.3 Initialization and Configuration ..................................................................................... 261 8.3.1 Module Initialization ..................................................................................................... 261 8.3.2 Configuring a Memory-to-Memory Transfer ................................................................... 261 8.3.3 Configuring a Peripheral for Simple Transmit ................................................................ 263 8.3.4 Configuring a Peripheral for Ping-Pong Receive ............................................................ 264 8.3.5 Configuring Channel Assignments ................................................................................ 267 8.4 Register Map .............................................................................................................. 267 June 14, 2010 4 Texas Instruments-Advance Information Table of Contents |
Số phần tương tự - LM3S9B92-IQR20-C1T |
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Mô tả tương tự - LM3S9B92-IQR20-C1T |
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