MC33566

http://onsemi.com

4

Compensation

&

Hysteresis

Ref &

Detect

5V detect

Comp

Driver

Drive out

Hyst sw

External

P−channel

MOSFET

External

4.7

μF

cap

LDO

Figure 2. Functional Block Diagram

FUNCTIONAL DESCRIPTION

Input Blocking − The internal NPN pass transistor of the

LDO regulator ensures that no significant reverse current

5.0 Volt Detect − Internal circuitry detects the presence of

the 5.0 V input supply. When the 5.0 V supply drops below

P−channel MOSFET) is enabled. The 5.0 V detect logic is

active throughout the entire range of ramp−up from 0 to

5.5 V. Additionally, the drive out signal is never turned ON

Glitch−free Transfer − The design of the 5.0 V detect

circuitry and drive out control circuitry guarantees that the

listed in the table of DC Operating Specifications even with

rates in the table of AC Operating Specifications.

Offset Voltage Performance − To ensure performance

capable of operating with either one or both of these inputs

rising from or falling to zero volts, or with offsets of 0.05 V

to 0.9 V as the inputs ramp up and down.

Motherboard/

Mainboard

PCI Slot

Figure 3. Application Block Diagram

PCI Card

Circuitry

5V

3.3V aux

4.7

μF

1

2

3

4

5

D

R

V

O

G

N

D

V

I

N

V

A

U

X

4.7

μF