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MC14017B bảng dữ liệu(PDF) 1 Page - Motorola, Inc |
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MC14017B bảng dữ liệu(HTML) 1 Page - Motorola, Inc |
1 / 7 page MOTOROLA CMOS LOGIC DATA MC14017B 74 Decade Counter The MC14017B is a five–stage Johnson decade counter with built–in code converter. High speed operation and spike–free outputs are obtained by use of a Johnson decade counter design. The ten decoded outputs are normally low, and go high only at their appropriate decimal time period. The output changes occur on the positive–going edge of the clock pulse. This part can be used in frequency division applications as well as decade counter or decimal decode display applications. • Fully Static Operation • DC Clock Input Circuit Allows Slow Rise Times • Carry Out Output for Cascading • Divide–by–N Counting • Supply Voltage Range = 3.0 Vdc to 18 Vdc • Capable of Driving Two Low–power TTL Loads or One Low–power Schottky TTL Load Over the Rated Temperature Range • Pin–for–Pin Replacement for CD4017B • Triple Diode Protection on All Inputs MAXIMUM RATINGS* (Voltages Referenced to VSS) Symbol Parameter Value Unit VDD DC Supply Voltage – 0.5 to + 18.0 V Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V lin, lout Input or Output Current (DC or Transient), per Pin ± 10 mA PD Power Dissipation, per Package† 500 mW Tstg Storage Temperature – 65 to + 150 _C TL Lead Temperature (8–Second Soldering) 260 _C * Maximum Ratings are those values beyond which damage to the device may occur. †Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/ _C From 65_C To 125_C Ceramic “L” Packages: – 12 mW/ _C From 100_C To 125_C LOGIC DIAGRAM CLOCK CLOCK ENABLE CARRY RESET Q5 Q1 Q7 Q3 Q9 11 7 6 2 1 12 Q0 Q6 Q2 Q3 Q4 3 5 4 9 10 14 13 15 C C D R R Q Q C C D R R Q Q C C D R R Q Q C C D R R Q Q C C D R R Q Q MOTOROLA SEMICONDUCTOR TECHNICAL DATA © Motorola, Inc. 1995 REV 3 1/94 MC14017B L SUFFIX CERAMIC CASE 620 ORDERING INFORMATION MC14XXXBCP Plastic MC14XXXBCL Ceramic MC14XXXBD SOIC TA = – 55° to 125°C for all packages. P SUFFIX PLASTIC CASE 648 D SUFFIX SOIC CASE 751B BLOCK DIAGRAM FUNCTIONAL TRUTH TABLE (Positive Logic) Clock Decode Clock Enable Reset Output=n 0 X 0 n X 1 0 n X X 1 Q0 0 0 n+1 X 0 n X 0 n 1 0 n+1 X = Don’t Care. If n < 5 Carry = “1”, Otherwise = “0”. CLOCK CLOCK ENABLE RESET 14 13 15 Cout Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 3 2 4 7 10 1 5 6 9 11 12 VDD = PIN 16 VSS = PIN 8 |
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Mô tả tương tự - MC14017B |
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