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ADM1030ARQZ bảng dữ liệu(PDF) 11 Page - ON Semiconductor |
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ADM1030ARQZ bảng dữ liệu(HTML) 11 Page - ON Semiconductor |
11 / 29 page REV. A ADM1030 –11– asserted low. The behavior of the high limit and THERM limit is as follows: 1. Whenever the temperature measured exceeds the high tem- perature limit, the INT pin is asserted low. 2. If the temperature exceeds the THERM limit, the THERM output asserts low. This can be used to throttle the CPU clock. If the THERM-to-Fan Enable bit (Bit 7 of THERM behavior/revision register) is cleared to 0, the fan will not run full-speed. The THERM limit may be programmed at a lower temperature than the high temperature limit. This allows the system to run in silent mode, where the CPU can be throttled while the cooling fan is off. If the temperature continues to increase, and exceeds the high temperature limit, an INT is generated. Software may then decide whether the fan should run to cool the CPU. This allows the system to run in SILENT MODE. 3. If the THERM-to-Fan Enable bit is set to 1, the fan will run full-speed whenever THERM is asserted low. In this case, both throttling and active cooling take place. If the high temperature limit is programmed to a lower value than the THERM limit, exceeding the high temperature limit will assert INT low. Software could change the speed of the fan depending on temperature readings. If the temperature con- tinues to increase and exceeds the THERM limit, THERM asserts low to throttle the CPU and the fan runs full-speed. This allows the system to run in PERFORMANCE MODE, where active cooling takes place and the CPU is only throttled at high temperature. Using the high temperature limit and the THERM limit in this way allows the user to gain maximum performance from the system by only slowing it down, should it be at a critical temperature. Although the ADM1030 does not have a dedicated Interrupt Mask Register, clearing the appropriate enable bits in Configu- ration Register 2 will clear the appropriate interrupts and mask out future interrupts on that channel. Disabling interrupt bits will prevent out-of-limit conditions from generating an interrupt or setting a bit in the Status Registers. USING THERM AS AN INPUT The THERM pin is an open-drain input/output pin. When used as an output, it signals over-temperature conditions. When asserted low as an output, the fan will be driven full-speed if the THERM-to-Fan Enable bit is set to 1 (Bit 7 of Register 0x3F). When THERM is pulled low as an input, the THERM bit (Bit 7) of Status Register 2 is set to 1, and the fan is driven full-speed. Note that the THERM-to-Fan Enable bit has no effect when- ever THERM is used as an input. If THERM is pulled low as an input, and the THERM-to-Fan Enable bit = 0, the fan will still be driven full-speed. The THERM-to-Fan Enable bit only affects the behavior of THERM when used as an output. STATUS REGISTERS All out-of-limit conditions are flagged by status bits in Status Registers 1 and 2 (0x02, 0x03). Bits 0 and 1 (Alarm Speed, Fan Fault) of Status Register 1, once set, may be cleared by reading Status Register 1. Once the Alarm Speed bit is cleared, this bit will not be reasserted on the next monitoring cycle even if the condition still persists. This bit may be reasserted only if the fan is no longer at Alarm Speed. Bit 1 (Fan Fault) is set whenever a fan tach failure is detected. Once cleared, it will reassert on subsequent fan tach failures. Bits 2 and 3 of Status Register 1 are the Remote Temperature High and Low status bits. Exceeding the high or low temperature limits for the external channel sets these status bits. Reading the status register clears these bits. However, these bits will be reasserted if the out-of limit condition still exists on the next monitoring cycle. Bits 6 and 7 are the Local Temperature High and Low status bits. These behave exactly the same as the Remote Temper- ature High and Low status bits. Bit 4 of Status Register 1 indicates that the Remote Temperature THERM limit has been exceeded. This bit gets cleared on a read of Status Register 1 (see Figure 5). Bit 5 indicates a Remote Diode Error. This bit will be a 1 if a short or open is detected on the Remote Temperature channel on power-up. If this bit is set to 1 on power-up, it cannot be cleared. Bit 6 of Status Register 2 (0x03) indicates that the Local THERM limit has been exceeded. This bit is cleared on a read of Status Register 2. Bit 7 indicates that THERM has been pulled low as an input. This bit can also be cleared on a read of Status Register 2. 5� INT REARMED STATUS REG. READ TEMP THERM LIMIT THERM INT Figure 5. Operation of THERM and INT Signals Figure 5 shows the interaction between INT and THERM. Once a critical temperature THERM limit is exceeded, both INT and THERM assert low. Reading the Status Registers clears the interrupt and the INT pin goes high. However, the THERM pin remains asserted until the measured temperature falls 5 C below the exceeded THERM limit. This feature can be used to CPU throttle or drive a fan full-speed for maximum cooling. Note, that the INT pin for that interrupt source is not rearmed until the temperature has fallen below the THERM limit –5 C. This prevents unnecessary interrupts from tying up valuable CPU resources. MODES OF OPERATION The ADM1030 has four different modes of operation. These modes determine the behavior of the system. 1. Automatic Fan Speed Control Mode. 2. Filtered Automatic Fan Speed Control Mode. 3. PWM Duty Cycle Select Mode (directly sets fan speed under software control). 4. RPM Feedback Mode. Rev. 2 | Page 11 of 29 | www.onsemi.com |
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