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SM320DM642AGDKS7EP bảng dữ liệu(PDF) 6 Page - Texas Instruments

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tên linh kiện SM320DM642AGDKS7EP
Giải thích chi tiết về linh kiện  Video/Imaging Fixed Point Digital Signal Processor
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SM320DM642AGDKS7EP bảng dữ liệu(HTML) 6 Page - Texas Instruments

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2
Device Overview
2.1 Device Characteristics
SM320DM642-EP
Video/Imaging Fixed Point Digital Signal Processor
SGUS058C – JUNE 2007 – REVISED JUNE 2009
www.ti.com
Table 2-1 provides an overview of the DM642 DSP. The table shows significant features of the DM642
device, including the capacity of on-chip RAM, the peripherals, the CPU frequency, and the package type
with pin count.
Table 2-1. Characteristics of the DM642 Processor
HARDWARE FEATURES
DM642
EMIFA (64-bit bus width)
1
(clock source = AECLKIN)
EDMA (64 independent channels)
1
McASP0 (uses Peripheral Clock [AUXCLK])
1
I2C0 (uses Peripheral Clock)
1
HPI (32- or 16-bit user selectable)
1 (HPI16 or HPI32)
Peripherals
PCI (32-bit), 66-MHz/33-MHz
1
[DeviceID Register value 0x9065]
Not all peripherals pins are
available at the same time
McBSPs
2
(For more detail, see the
(internal clock source = CPU/4 clock frequency)
Device Configuration
Configurable Video Ports (VP0, VP1, VP2)
3
section).
10/100 Ethernet MAC (EMAC)
1
Management Data Input/Output (MDIO)
1
VCXO Interpolated Control Port (VIC)
1
32-Bit Timers
3
(internal clock source = CPU/8 clock frequency)
General-Purpose Input/Output Port (GP0)
16
Size (Bytes)
288K
16K-Byte (16KB) L1 Program (L1P) Cache
On-Chip Memory
Organization
16KB L1 Data (L1D) Cache
256KB Unified Mapped RAM/Cache (L2)
CPU ID + CPU Rev ID
Control Status Register (CSR.[31:16])
0x0C01
JTAG BSDL_ID
JTAGID register (address location: 0x01B3F008)
0x0007902F
Frequency
MHz
500, 600, 720
2 ns (DM642-500) and (DM642A-500)
[500 MHz CPU, 100 MHz EMIF(1), 33 MHz PCI port]
1.67 ns (DM642-600) and (DM642A-600)
Cycle Time
ns
[600 MHz CPU, 133 MHz EMIF(1), 66 MHz PCI port]
1.39 ns (DM642-720)
[720 MHz CPU, 133 MHz EMIF(1), 66 MHz PCI port]
1.2 V (–500)
Core (V)
1.4 V (A-500, A-600, -600, -720)
Voltage
I/O (V)
3.3 V
PLL Options
CLKIN frequency multiplier
Bypass (x1), x6, x12
23
× 23 mm
548-Pin BGA (GDK )
BGA Package
27
× 27 mm
548-Pin BGA (GNZ and ZNZ)
Process Technology
µm
0.13
µm
Product Preview (PP), Advance Information (AI),
Product Status(2)
PD
or Production Data (PD)
(1)
On this DM64x™ device, the rated EMIF speed affects only the SDRAM interface on the EMIF. For more detailed information, see the
EMIF device speed portion of this data sheet. The 500MHz and 600MHz speed devices are product preview only.
(2)
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Device Overview
6
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