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ADRF6510 bảng dữ liệu(PDF) 7 Page - Analog Devices

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ADRF6510
Rev. 0 | Page 7 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
1
VPSD
2
COMD
3
LE
4
CLK
5
DATA
6
SDO
7
COM
8
VPS
24 OPP1
23 OPM1
22 COM
21 GAIN
20 VOCM
19 COM
18 OPM2
17 OPP2
TOP VIEW
(Not to Scale)
ADRF6510
NOTES
1. CONNECT THE EXPOSED PADDLE TO
A LOW IMPEDANCE GROUND PAD.
Figure 4. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VPSD
Digital Positive Supply Voltage: 4.75 V to 5.25 V.
2
COMD
Digital Common. Connect to external circuit common using the lowest possible impedance.
3
LE
Latch Enable. SPI programming pin. CMOS levels: VLOW < 0.8 V, VHIGH > 2 V.
4
CLK
SPI Port Clock. CMOS levels: VLOW < 0.8 V, VHIGH > 2 V.
5
DATA
SPI Data Input. CMOS levels: VLOW < 0.8 V, VHIGH > 2 V.
6
SDO
SPI Data Output. CMOS levels: VLOW < 0.8 V, VHIGH > 2 V.
7, 9, 13, 19, 22, 28
COM
Analog Common. Connect to external circuit common via a 1 kΩ resistor.
8, 12, 16, 25, 29
VPS
Analog Positive Supply Voltage: 4.75 V to 5.25 V.
10, 11, 30, 31
INP2, INM2,
INM1, INP1
Differential Inputs. 400 Ω input impedance. Common-mode range is 1.5 V to 2.5 V; default is 2.1 V.
14
OFDS
Offset Correction Loop Disable. Pull high to disable the offset correction loop.
15, 26
OFS2, OFS1
Offset Correction Loop Compensation Capacitors. Connect capacitors to circuit common.
17, 18, 23, 24
OPP2, OPM2,
OPM1, OPP1
Differential Outputs. 20 Ω output impedance. Common-mode range is 1.5 V to 3 V; default is VPS/2.
20
VOCM
Output Common-Mode Setpoint. Defaults to VPS/2 if left open.
21
GAIN
Analog Gain Control. 0 V to 2 V, 30 mV/dB gain scaling.
27
GNSW
Front-End Gain Switch, 6 dB or 12 dB. Pull low for 6 dB; pull high for 12 dB.
32
ENBL
Chip Enable. Pull high to enable.
EP
Exposed Paddle. Connect the exposed paddle to a low impedance ground pad.


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