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MC9S08QD4 bảng dữ liệu(PDF) 9 Page - Freescale Semiconductor, Inc

tên linh kiện MC9S08QD4
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MC9S08QD4 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
9
Contents
Section Number
Title
Page
Chapter 1
Device Overview
1.1
Introduction .....................................................................................................................................17
1.2
Devices in the MC9S08QD4 Series ................................................................................................17
1.2.1 MCU Block Diagram ........................................................................................................19
1.3
System Clock Distribution ..............................................................................................................20
Chapter 2
External Signal Description
2.1
Device Pin Assignment ...................................................................................................................21
2.2
Recommended System Connections ...............................................................................................21
2.2.1 Power ................................................................................................................................22
2.2.2 Oscillator ...........................................................................................................................23
2.2.3 Reset (Input Only) ............................................................................................................23
2.2.4 Background / Mode Select (BKGD/MS) ..........................................................................23
2.2.5 General-Purpose I/O and Peripheral Ports ........................................................................24
Chapter 3
Modes of Operation
3.1
Introduction .....................................................................................................................................27
3.2
Features ...........................................................................................................................................27
3.3
Run Mode ........................................................................................................................................27
3.4
Active Background Mode ...............................................................................................................27
3.5
Wait Mode .......................................................................................................................................28
3.6
Stop Modes ......................................................................................................................................28
3.6.1 Stop2 Mode .......................................................................................................................29
3.6.2 Stop3 Mode .......................................................................................................................30
3.6.3 Active BDM Enabled in Stop Mode .................................................................................30
3.6.4 LVD Enabled in Stop Mode ..............................................................................................31
3.6.5 On-Chip Peripheral Modules in Stop Modes ....................................................................31
Chapter 4
Memory Map and Register Definition
4.1
MC9S08QD4 Series Memory Maps ...............................................................................................33
4.2
Reset and Interrupt Vector Assignments .........................................................................................34
4.3
Register Addresses and Bit Assignments ........................................................................................35
4.4
RAM ................................................................................................................................................38
4.5
Flash ................................................................................................................................................39
4.5.1 Features .............................................................................................................................39


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