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MC9S08QA2CEDNE bảng dữ liệu(PDF) 8 Page - Freescale Semiconductor, Inc

tên linh kiện MC9S08QA2CEDNE
Giải thích chi tiết về linh kiện  Technical Data
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MC9S08QA2CEDNE bảng dữ liệu(HTML) 8 Page - Freescale Semiconductor, Inc

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MC9S08QA4 Series MCU Data Sheet, Rev. 3
Electrical Characteristics
Freescale Semiconductor
8
(VDD rising)
2.16
2.19
2.27
Power on reset (POR) re-arm voltage
Vpor
—1.4
V
Bandgap voltage reference
VBG
1.18
1.20
1.21
V
Input high voltage (VDD > 2.3 V) (all digital inputs)
VIH
0.70
× V
DD
——
V
Input high voltage (1.8 V
≤ V
DD ≤ 2.3 V) (all digital inputs)
0.85
× V
DD
——
Input low voltage (VDD > 2.3 V) (all digital inputs)
VIL
0.35
× V
DD
V
Input low voltage (1.8 V
≤ V
DD ≤ 2.3 V) (all digital inputs)
0.30
× V
DD
Input hysteresis (all digital inputs)
Vhys
0.06
× V
DD
——
V
Input leakage current (per pin)
VIn = VDD or VSS, all input-only pins
|IIn|
0.025
1.0
μA
High impedance (off-state) leakage current (per pin)
VIn = VDD or VSS, all input/output
|IOZ|
0.025
1.0
μA
Internal pullup resistors3,4
RPU
17.5
52.5
k
Ω
Internal pulldown resistor (KBI)
RPD
17.5
52.5
k
Ω
Output high voltage — low drive (PTxDSn = 0)
IOH = –2 mA (VDD ≥ 1.8 V)
VOH
VDD – 0.5
V
Output high voltage — high drive (PTxDSn = 1)
IOH = –10 mA (VDD ≥ 2.7 V)
IOH = –6 mA (VDD ≥ 2.3 V)
IOH = –3 mA (VDD ≥ 1.8 V)
VDD – 0.5
Maximum total IOH for all port pins
|IOHT|—
60
mA
Output low voltage — low drive (PTxDSn = 0)
IOL = 2.0 mA (VDD ≥ 1.8 V)
VOL
——
0.5
V
Output low voltage — high drive (PTxDSn = 1)
IOL = 10.0 mA (VDD ≥ 2.7 V)
IOL = 6 mA (VDD ≥ 2.3 V)
IOL = 3 mA (VDD ≥ 1.8 V)
0.5
0.5
0.5
Maximum total IOL for all port pins
IOLT
——
60
mA
DC injection current 2, 5, 6, 7
VIn < VSS, VIn > VDD
Single pin limit
Total MCU limit, includes sum of all stressed pins
IIC
–0.2
–5
0.2
5
mA
mA
Input capacitance (all non-supply pins)
CIn
——
7
pF
1 RAM will retain data down to POR voltage. RAM data not guaranteed to be valid following a POR.
2 This parameter is characterized and not tested on each device.
3 Measurement condition for pull resistors: V
In = VSS for pullup and VIn = VDD for pulldown.
4 PTA5/IRQ/TCLK/RESET pullup resistor may not pull up to the specified minimum V
IH. However, all ports are functionally tested
to guarantee that a logic 1 will be read on any port input when the pullup is enabled and no DC load is present on the pin.
5 All functional non-supply pins are internally clamped to V
SS and VDD.
Table 6. DC Characteristics (Temperature Range = –40 to 85
°C Ambient) (continued)
Parameter
Symbol
Min
Typical
Max
Unit


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