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MC9S08DV128F2MLL bảng dữ liệu(PDF) 10 Page - Freescale Semiconductor, Inc

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MC9S08DV128F2MLL bảng dữ liệu(HTML) 10 Page - Freescale Semiconductor, Inc

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MC9S08DZ128 Series Data Sheet, Rev. 1
10
Freescale Semiconductor
Section Number
Title
Page
4.4.3
MMU Registers and Control Bits .....................................................................................63
4.5
RAM.................................................................................................................................................66
4.6
FLASH and EEPROM .....................................................................................................................67
4.6.1
Features .............................................................................................................................67
4.6.2
Program and Erase Times .................................................................................................67
4.6.3
Program and Erase Command Execution .........................................................................68
4.6.4
Burst Program Execution ..................................................................................................69
4.6.5
Sector Erase Abort ............................................................................................................72
4.6.6
Access Errors ....................................................................................................................73
4.6.7
Block Protection ................................................................................................................74
4.6.8
Vector Redirection ............................................................................................................74
4.6.9
Security .............................................................................................................................74
4.6.10 EEPROM Mapping ...........................................................................................................76
4.6.11 FLASH and EEPROM Registers and Control Bits ...........................................................76
Chapter 5
Resets, Interrupts, and General System Control
5.1
Introduction ......................................................................................................................................85
5.2
Features ............................................................................................................................................85
5.3
MCU Reset .......................................................................................................................................85
5.4
Computer Operating Properly (COP) Watchdog..............................................................................86
5.5
Interrupts ..........................................................................................................................................87
5.5.1
Interrupt Stack Frame .......................................................................................................88
5.5.2
External Interrupt Request (IRQ) Pin ...............................................................................88
5.5.3
Interrupt Vectors, Sources, and Local Masks ....................................................................89
5.6
Low-Voltage Detect (LVD) System .................................................................................................91
5.6.1
Power-On Reset Operation ...............................................................................................91
5.6.2
Low-Voltage Detection (LVD) Reset Operation ...............................................................91
5.6.3
Low-Voltage Warning (LVW) Interrupt Operation ...........................................................92
5.7
MCLK Output ..................................................................................................................................92
5.8
Reset, Interrupt, and System Control Registers and Control Bits ....................................................92
5.8.1
Interrupt Pin Request Status and Control Register (IRQSC) ............................................92
5.8.2
System Reset Status Register (SRS) .................................................................................94
5.8.3
System Background Debug Force Reset Register (SBDFR) ............................................95
5.8.4
System Options Register 1 (SOPT1) ................................................................................96
5.8.5
System Options Register 2 (SOPT2) ................................................................................97
5.8.6
System Device Identification Register (SDIDH, SDIDL) ................................................98
5.8.7
System Power Management Status and Control 1 Register (SPMSC1) ...........................99
5.8.8
System Power Management Status and Control 2 Register (SPMSC2) .........................100


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