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AM1806ZWT4 bảng dữ liệu(PDF) 2 Page - Texas Instruments |
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AM1806ZWT4 bảng dữ liệu(HTML) 2 Page - Texas Instruments |
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2 / 241 page  AM1806 SPRS658B – FEBRUARY 2010 – REVISED MAY 2010 www.ti.com • Two Multichannel Buffered Serial Ports: • One 64-bit General-Purpose/Watchdog Timer (Configurable as Two 32-bit General-Purpose – Transmit/Receive Clocks Timers) – Two Clock Zones and 16 Serial Data Pins • Two Enhanced Pulse Width Modulators – Supports TDM, I2S, and Similar Formats (eHRPWM): – AC97 Audio Codec Interface – Dedicated 16-Bit Time-Base Counter With – Telecom Interfaces (ST-Bus, H100) Period And Frequency Control – 128-channel TDM – 6 Single Edge, 6 Dual Edge Symmetric or 3 – FIFO buffers for Transmit and Receive Dual Edge Asymmetric Outputs • Video Port Interface (VPIF): – Dead-Band Generation – Two 8-bit SD (BT.656), Single 16-bit or Single – PWM Chopping by High-Frequency Carrier Raw (8-/10-/12-bit) Video Capture Channels – Trip Zone Input – Two 8-bit SD (BT.656), Single 16-bit Video • Three 32-Bit Enhanced Capture Modules Display Channels (eCAP): • Universal Parallel Port (uPP): – Configurable as 3 Capture Inputs or 3 – High-Speed Parallel Interface to FPGAs and Auxiliary Pulse Width Modulator (APWM) Data Converters outputs – Data Width on Each of Two Channels is 8- to – Single Shot Capture of up to Four Event 16-bit Inclusive Time-Stamps – Single Data Rate or Dual Data Rate Transfers • 361-Ball Pb-Free Plastic Ball Grid Array (PBGA) – Supports Multiple Interfaces with START, [ZCE Suffix], 0.65-mm Ball Pitch ENABLE and WAIT Controls • Commercial or Extended Temperature • Real-Time Clock With 32 KHz Oscillator and • Community Resources Separate Power Rail – TI E2E Community • Three One 64-Bit General-Purpose Timers – TI Embedded Processors Wiki (Configurable as Two 32-Bit Timers) 2 AM1806 ARM Microprocessor Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM1806 |
Số phần tương tự - AM1806ZWT4 |
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Mô tả tương tự - AM1806ZWT4 |
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