ADRF6655ACPZ-R7 datasheet(11/44 Pages) AD

tên linh kiện	ADRF6655ACPZ-R7

Giải thích chi tiết về linh kiện	Broadband Up/Downconverting Mixer with Integrated Fractional-N PLL and VCO

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ADRF6655

Rev. 0 | Page 11 of 44

UPCONVERSION

Measured using typical upconversion circuit schematic with high-side LO and 340 MHz RF input, unless otherwise noted.

OUTPUT FREQUENCY (MHz)

–5

–4

–3

–2

–1

0

1

2

3

4

5

710

810

910

1010

1110

1210

1310

1410

1510

1610

+25°C

–40°C

+85°C

Figure 16. Conversion Gain vs. Output Frequency

–100

–90

–80

–70

–60

–50

–40

–30

–20

–10

0

1050 1150 1250 1350 1450 1550 1650 1750 1850 1950 2050 2150 2250

LO FREQUENCY (MHz)

+25°C

–40°C

+85°C

Figure 17. fLO − 2 × fRF Spurious Response vs.

LO Frequency (Relative to IF Output Power)

–80

–70

–60

–50

–40

–30

–20

–10

0

1050 1150 1250 1350 1450 1550 1650 1750 1850 1950 2050

LO FREQUENCY (MHz)

+25°C

–40°C

+85°C

Figure 18. LO-to-IF Output Leakage vs. Frequency

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

710

810

910

1010

1110

1210

1310

1410

1510

1610

OUTPUT FREQUENCY (MHz)

+25°C

–40°C

+85°C

IP3SET = 3.2V

IP3SET = OPEN

Figure 19. Output IP3 vs. Output Frequency

710

810

910

1010

1110

1210

1310

1410

1510

1610

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

OUTPUT FREQUENCY (MHz)

+25°C

–40°C

+85°C

IP3SET = 3.2V

IP3SET = OPEN

Figure 20. Output P1dB vs. Output Frequency

–170

–160

–150

–140

–130

–120

–110

–100

710

810

910

1010

1110

1210

1310

1410

1510

1610

OUTPUT FREQUENCY (MHz)

Figure 21. Output Noise Spectral Density vs. Output Frequency

Số phần tương tự - ADRF6655ACPZ-R7

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Analog Devices	ADRF6650	1Mb / 61P	Dual Downconverter with DVGA and PLL/VCO, 450 MHz to 2700 MHz
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	ADRF6650ACPZ	1Mb / 61P	Dual Downconverter with DVGA and PLL/VCO, 450 MHz to 2700 MHz
	ADRF6650ACPZ-RL7	1Mb / 61P	Dual Downconverter with DVGA and PLL/VCO, 450 MHz to 2700 MHz
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