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ST7549T bảng dữ liệu(PDF) 9 Page - Sitronix Technology Co., Ltd. |
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ST7549T bảng dữ liệu(HTML) 9 Page - Sitronix Technology Co., Ltd. |
9 / 52 page ST7549T Ver 1.3 9/52 2005/12/06 Pin Name I/O Description No. of Pins /WR(R/W) I Read/Write execution control pin (PS[0:1]=[L:H]) PS2 MPU type /WR(R/W) Description H 6800-series R/W Read/Write control input pin R/W=" H “: read R/W=" L”: write L 8080-series /WR Write enable clock input pin The data on D0 to D7 are latched at the rising edge of the /WR signal When in the serial interface must fix to ” H” 1 /RD (E) I Read/Write execution control pin (PS[0:1]=[L:H]) PS2 MPU Type /RD (E) Description H 6800-series E Read/Write control input pin R/W=" H “: When E is " H ", D0 to D7 are in an output status. R/W=" L “: The data on D0 to D7 are latched at the falling edge of the E signal. L 8080-series /RD Read enable clock input pin When /RD is " L ", D0 to D7 are in an output status. When in the serial interface must fix to ” H” 1 When using 8-bit parallel interface : 6800 . 8080 8-bit bi-directional data bus that is connected to the standard 8-bit microprocessor data bus. When chip select is not active, D0 to D7 is high impedance. When using serial interface: 4-LINE D0: serial input clock (SCLK) D1,D2, D3 : serial input data (SDA), must be connected together D4, D5, D6, D7 : must fix to ” H” When chip select is not active, D0 to D7 is high impedance. D7 to D4 D1 to D3 (SDA) D0(SCLK) I/O When using serial interface: 3-LINE D0 : serial input clock (SCLK) D1 : serial input data (SDA_IN) D2, D3 : serial data output for read ID function(SDA_OUT) D4 : ID1 ,When connect to VSS, ID1=0;connect to VDD,ID1=1 D5 : ID2 ,When connect to VSS, ID2=0;connect to VDD,ID2=1 D6 : ID3 ,When connect to VSS, ID3=0;connect to VDD,ID3=1 D7 : ID4 ,When connect to VSS, ID4=0;connect to VDD,ID4=1 Suggest D1~D3 be connected together; Suggest D4~D7(ID1~ID4) be connected to VDD if not used When chip select is not active, D0 to D7 is high impedance. 8 |
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