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STI7108 bảng dữ liệu(PDF) 1 Page - STMicroelectronics |
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1 / 12 page Data brief For further information contact your local STMicroelectronics sales office. November 2009 Doc ID 16790 Rev 1 1/12 12 STi7108 Advanced HD AVC decoder with 3D graphics acceleration Features ■ Open GL ES 2.0/Open VG 1.1 compatible 3D graphics GPU for enhanced EPGs/UIs ■ Dual HD (1080i/720p) video decode for PIP or mosaic support ■ 1080p50, 1080p60 video decoding ■ High-performance ST40-300 500 MHz applications CPU with Level 2 cache ■ High-performance ST40-300 500 MHz real-time CPU ■ Dual eSATA ports ■ Triple USB 2.0 host ports ■ Dual 16-bit/32-bit LMI supporting DDR2/DDR3 ■ Dual Ethernet GMAC ■ Low power process and design with dynamic power management architecture Description STi7108 is the next generation of HD, AVC set-top box decoder for satellite, cable, terrestrial and IP-STB markets. The STi7108 provides a solution for operators to specify a range of high-performance, MPEG2 / H.264 / VC-1 STBs. The STi7108 can be used with Zappers, IP clients, DVR standalone, and DVR server/home network STBs, especially where true 3D graphics is required. Content delivery is possible using broadcast or broadband networks, or both (hybrid STBs). The STi7108 is also targeted at next generation DLNA compatible Blu-ray (BD) and HD Media players. JTAG STB peripherals I/O Digital video HD/SD in/out Resets Analog out Clocks Modes PCM I/O S/PDIF out External interrupts Peripherals Smartcard Connectivity Transport Security STFE STBE Video planes Graphic planes Cursor plane Main VDP DEI, IQI DVO Denc Teletext DACs Analog video HD/SD out Audio I/O Display HDMI 1.3 Video I/O Transport streams Parallel/serial in/out Audio decoder ST231 CPU Video decoder EMI PCI SPI System interfaces Aux VDP CPU/FPU MMU Interrupts I cache D cache Timer Dual Debug STBus PCM Players PCM Reader DACs Flash, SFlash 500 MHz ST40-300 Bdisp blitter Dual LMI MSCC MCHI ST231 CPU Delta Mu 3D graphics Tile SRAM Capture VTGs DVP HDCP Dual eSATA Dual Ethernet DAA SD-MMC/SDIO Triple USB Key scan Clock Gen System serv Triple FDMA L2 cache Low power NOR, NAND Serial Flash PCI peripherals DDR2/DDR3 processing unit SSC UART MAFE PWM GPIOs IR/UHF Application Co-processor ST231 CPU www.st.com |
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