ADF4602BCPZ-RL datasheet(7/36 Pages) AD

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ADF4602

Rev. 0 | Page 7 of 36

Parameter

Min

Typ

Max

Unit

Test Conditions

POWER SUPPLIES

Voltage Supply

VDD

3.1

3.3

3.6

V

Main supply input

VSUP1

2.6

V

Output from internal LDO1, 10 mA rating,

supply for RX VCO

VSUP2

2.8

V

Output from Internal LDO2, 30 mA rating,

supply for RX baseband and RX down-

converter

VSUP3

1.9

V

Output from internal LDO3, 10 mA rating,

supply for RX LNAs

VSUP4

2.6

V

Output from internal LDO4, 10 mA rating,

supply for TX VCO

VSUP5

2.8

V

Output from internal LDO5, 100 mA rating,

supply for TX modulator, TX baseband, PA

control DACs

VSUP6

1.9

V

Supply input for RX synthesizer,

connect to VSUP3

VSUP7

1.9

V

Supply input for TX synthesizer,

connect to VSUP3

VSUP8

2.8

V

Supply input for reference section,

connect to VSUP2

VINT

1.6

1.8

2.0

V

Supply input for serial interface control

logic

CURRENT CONSUMPTION

Transmit Current Consumption

VDD = 3.6 V, output is matched into 50 Ω

−8 dBm Output Level

100

mA

FRF = 2170 MHz

−28 dBm Output Level

50

mA

FRF = 2170 MHz

Receive Current Consumption

50

mA

1 The reference frequency should be dc coupled to the REFIN pin. It is ac-coupled internally.

2 The noise figure measurement does not include spurious due to harmonics of the 26 MHz reference frequency. Spurs appear at integer multiples of the reference

frequency (every 26 MHz), degrading the receive sensitivity by about 6 dB.

3 Guaranteed by design, not production tested.

4 Bit sif_vsup8 in Register 2 controls whether 1.8 V readback mode or 2.8 V readback mode is selected. See the S

section for more details.

erial Port Interface (SPI)

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