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ADAU1381BCBZ-RL bảng dữ liệu(PDF) 2 Page - Analog Devices

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Giải thích chi tiết về linh kiện  Low Noise Stereo Codec with Enhanced Recording and Playback Processing
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ADAU1381BCBZ-RL bảng dữ liệu(HTML) 2 Page - Analog Devices

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ADAU1381
Rev. 0 | Page 2 of 84
TABLE OF CONTENTS
Features .............................................................................................. 1
 
Applications....................................................................................... 1
 
General Description ......................................................................... 1
 
Functional Block Diagram .............................................................. 1
 
Revision History ............................................................................... 3
 
Specifications..................................................................................... 4
 
Record Side Performance Specifications................................... 4
 
Output Side Performance Specifications................................... 6
 
Power Supply Specifications........................................................ 8
 
Typical Power Management Measurements ............................. 9
 
Digital Filters................................................................................. 9
 
Digital Input/Output Specifications......................................... 10
 
Digital Timing Specifications ................................................... 11
 
Absolute Maximum Ratings.......................................................... 14
 
Thermal Resistance .................................................................... 14
 
ESD Caution................................................................................ 14
 
Pin Configuration and Function Descriptions........................... 15
 
Typical Performance Characteristics ........................................... 17
 
System Block Diagrams ................................................................. 20
 
Theory of Operation ...................................................................... 24
 
Startup, Initialization, and Power ................................................. 25
 
Power-Up Sequence ................................................................... 25
 
Clock Generation and Management........................................ 26
 
Enabling Digital Power to Functional Subsystems ................ 26
 
Setting Up the Sound Engine.................................................... 26
 
Power Reduction Modes............................................................ 26
 
Power-Down Sequence.............................................................. 26
 
Clocking and Sampling Rates ....................................................... 27
 
Core Clock................................................................................... 27
 
Sampling Rates............................................................................ 27
 
PLL ............................................................................................... 28
 
Record Signal Path.......................................................................... 30
 
Input Signal Path ........................................................................ 30
 
Analog-to-Digital Converters................................................... 31
 
Digital Dual-Band Automatic Level Control (ALC) ............. 31
 
Playback Signal Path ...................................................................... 32
 
Output Signal Paths ................................................................... 32
 
Digital-to-Analog Converters................................................... 32
 
Line Outputs ............................................................................... 32
 
Speaker Output........................................................................... 32
 
Control Ports................................................................................... 33
 
I2C Port ........................................................................................ 33
 
SPI Port ........................................................................................ 36
 
Memory and Register Access.................................................... 36
 
Serial Data Input/Output Ports .................................................... 38
 
TDM Modes................................................................................ 38
 
General-Purpose Input/Outputs .................................................. 40
 
Sound Engine.................................................................................. 41
 
Signal Processing........................................................................ 41
 
Processing Flow .......................................................................... 41
 
Programming.............................................................................. 41
 
Parameter Memory .................................................................... 41
 
Applications Information .............................................................. 42
 
Power Supply Bypass Capacitors.............................................. 42
 
GSM Noise Filter ........................................................................ 42
 
Grounding ................................................................................... 42
 
Speaker Driver Supply Trace (AVDD2) .................................. 42
 
Exposed Pad PCB Design ......................................................... 42
 
Control Register Map..................................................................... 43
 
Clock Management, Internal Regulator, and PLL Control... 44
 
Record Path Configuration....................................................... 48
 
Serial Port Configuration .......................................................... 53
 
Audio Converter Configuration............................................... 58
 
Playback Path Configuration.................................................... 63
 


Số phần tương tự - ADAU1381BCBZ-RL

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