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ADG1634BCPZ-REEL7 bảng dữ liệu(PDF) 9 Page - Analog Devices |
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ADG1634BCPZ-REEL7 bảng dữ liệu(HTML) 9 Page - Analog Devices |
9 / 20 page ADG1633/ADG1634 Rev. 0 | Page 9 of 20 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 S1A D1 S1B S2A D2 S2B VDD IN1 EN VSS S3A IN2 IN3 D3 S3B GND ADG1633 TOP VIEW (Not to Scale) Figure 4. ADG1633 TSSOP Pin Configuration PIN 1 INDICATOR 1 D1 2 S1B 3 S2B 4 D2 11 VSS 12 EN 10 S3B 9D3 TOP VIEW (Not to Scale) ADG1633 NOTES 1. EXPOSED PAD IS TIED TO THE SUBSTRATE, VSS. Figure 5. ADG1633 LFCSP_VQ Pin Configuration Table 8. ADG1633 Pin Function Descriptions Pin No. Mnemonic Description TSSOP LFCSP_VQ 1 15 VDD Most Positive Power Supply Potential. 2 16 S1A Source Terminal 1A. Can be an input or an output. 3 1 D1 Drain Terminal 1. Can be an input or an output. 4 2 S1B Source Terminal 1B. Can be an input or an output. 5 3 S2B Source Terminal 2B. Can be an input or an output. 6 4 D2 Drain Terminal 2. Can be an input or an output. 7 5 S2A Source Terminal 2A. Can be an input or an output. 8 6 IN2 Logic Control Input 2. 9 7 IN3 Logic Control Input 3. 10 8 S3A Source Terminal 3A. Can be an input or an output. 11 9 D3 Drain Terminal 3. Can be an input or an output. 12 10 S3B Source Terminal 3B. Can be an input or an output. 13 11 VSS Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to ground. 14 12 EN Active Low Digital Input. When this pin is high, the device is disabled and all switches are off. When this pin is low, INx logic inputs determine the on switches. 15 13 IN1 Logic Control Input 1. 16 14 GND Ground (0 V) Reference. N/A 17 EP Exposed Pad. The exposed pad is tied to the substrate, VSS. Table 9. ADG1633 Truth Table EN INx SxA SxB 1 X1 Off Off 0 0 Off On 0 1 On Off 1 X = don’t care. |
Số phần tương tự - ADG1634BCPZ-REEL7 |
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Mô tả tương tự - ADG1634BCPZ-REEL7 |
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