công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

ISL12057IUZ-T bảng dữ liệu(PDF) 10 Page - Intersil Corporation

tên linh kiện ISL12057IUZ-T
Giải thích chi tiết về linh kiện  Low Cost and Low Power I2C RTC Real Time Clock/Calendar
Download  17 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  INTERSIL [Intersil Corporation]
Trang chủ  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL12057IUZ-T bảng dữ liệu(HTML) 10 Page - Intersil Corporation

Back Button ISL12057IUZ-T Datasheet HTML 6Page - Intersil Corporation ISL12057IUZ-T Datasheet HTML 7Page - Intersil Corporation ISL12057IUZ-T Datasheet HTML 8Page - Intersil Corporation ISL12057IUZ-T Datasheet HTML 9Page - Intersil Corporation ISL12057IUZ-T Datasheet HTML 10Page - Intersil Corporation ISL12057IUZ-T Datasheet HTML 11Page - Intersil Corporation ISL12057IUZ-T Datasheet HTML 12Page - Intersil Corporation ISL12057IUZ-T Datasheet HTML 13Page - Intersil Corporation ISL12057IUZ-T Datasheet HTML 14Page - Intersil Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 17 page
background image
10
FN6755.0
June 15, 2009
Interrupt Control Register (INT) [Address 0Eh]
OSCILLATOR ENABLE BIT (EOSC)
The EOSC bit enables the crystal oscillator function when it
is set to “0”. When the EOSC bit is set to “1”, the crystal
oscillator function is disable and the device enters into power
saving mode. The EOSC bit is set to “0” at power-up.
FREQUENCY OUT CONTROL BITS (RS2, RS1)
These bits select the output frequency at the IRQ1/FOUT
pin. INTCN must be set to “0” for frequency output at the
IRQ1/FOUT pin. Please see Table 3 for Frequency Selection
of the FOUT pin.
INTERRUPT CONTROL BIT (INTCN) AND ALARM
INTERRUPT ENABLE BITS (A2IE, A1IE)
The INTCN bit controls the relationship between the alarm
interrupts and the IRQ1/FOUT and IRQ2 pins. The A2IE and
A1IE bits enable the alarm interrupts, A2F and A1F, to assert
the IRQ1/FOUT and IRQ2 pins. Please see Table 4 for Alarm
Interrupt Selection with INTCN, A2IE and A1IE bits.
Status Register (SR) [Address 0Fh]
The Status Register is located in the memory map at
address 0Fh. This is a volatile register that provides status of
oscillator failure and alarm interrupts.
ALARM1 INTERRUPT BIT (A1F)
These bits announce if the Alarm1 matches the real time
clock. If there is a match, the respective bit is set to “1”. This
bit is manually reset to “0” by the user. A write to this bit in
the SR can only set it to “0”, not “1”.
ALARM2 INTERRUPT BIT (A2F)
These bits announce if the Alarm2 matches the real time
clock. If there is a match, the respective bit is set to “1”. This
bit is manually reset to “0” by the user. A write to this bit in
the SR can only set it to “0”, not “1”.
OSCILLATOR FAILURE BIT (OSF)
This bit is set to a “1” when there is no oscillation on X1 pin.
This is set by hardware (ISL12057 internally), and can only
be disabled by having an oscillation on X1 and and manually
reset to “0” to reset it..
Alarm1 Registers
Addresses [Address 07h to 0Ah]
The Alarm1 register bytes are set up identical to the RTC
register bytes, except that the MSB of each byte functions as
an enable bit (enable = “0”). These enable bits specify which
alarm registers (seconds, minutes, etc) are used to make the
comparison. When all the enable bits are set to “1”, the
Alarm1 will trigger once per second. Note that there is no
alarm byte for month and year.
The Alarm1 function works as a comparison between the
Alarm1 registers and the RTC registers. As the RTC
advances, the Alarm1 will be triggered once a match occurs
between the Alarm1 registers and the RTC registers. Any
one Alarm1 register, multiple registers, or all registers can be
enabled for a match.
To clear an Alarm1, the A1F status bit must be set to “0” with
a write.
TABLE 2. INTERRUPT CONTROL REGISTER (INT)
ADDR
7
6
5
43210
0Eh
EOSC
0
0
RS2
RS1
INTCN
A2IE
A1IE
Default
0
0
0
11000
TABLE 3. FREQUENCY SELECTION OF
FOUT PIN
FREQUENCY
FOUT (Hz)
RS2
RS1
COMMENT
32768
1
1
Free running crystal clock
8192
1
0
Free running crystal clock
4096
0
1
Free running crystal clock
1
0
0
Sync at RTC write
TABLE 4. ALARM INTERRUPT SELECTION WITH INTCN,
A2IE AND A1IE BITS
INTCN
A2IE
A1IE
IRQ1/FOUT
IRQ2
00
0
FOUT
HIGH
00
1
FOUT
A1F
01
0
FOUT
A2F
01
1
FOUT
A1F or A2F
1
0
0
HIGH
HIGH
10
1
HIGH
A1F
11
0
A2F
HIGH
11
1
A2F
A1F
TABLE 5. STATUS REGISTER (SR)
ADDR
7
6
5
4
3
2
1
0
0Fh
OSF
0
0
0
0
0
A2F
A1F
Default
1
0
0
0
0
0
0
0
TABLE 6. ALARM1 INTERRUPT WITH ENABLE BITS
SELECTION
A1DW/DT A1M1 A1M2 A1M3 A1M4
ALARM1 INTERRUPT
X
1111
Every Second
X
0111
Match Second
X
1011
Match Minute
ISL12057


Số phần tương tự - ISL12057IUZ-T

nhà sản xuấttên linh kiệnbảng dữ liệuGiải thích chi tiết về linh kiện
logo
Renesas Technology Corp
ISL12057IUZ RENESAS-ISL12057IUZ Datasheet
764Kb / 18P
   Low Cost and Low Power I2C RTC Real Time Clock/Calendar with Alarm Function and Dual IRQ Pins
More results

Mô tả tương tự - ISL12057IUZ-T

nhà sản xuấttên linh kiệnbảng dữ liệuGiải thích chi tiết về linh kiện
logo
Renesas Technology Corp
ISL12059 RENESAS-ISL12059 Datasheet
513Kb / 11P
   Low Cost and Low Power I2C Bus Real Time Clock/Calendar Low Power and Low Cost RTC
logo
Intersil Corporation
ISL12059 INTERSIL-ISL12059 Datasheet
196Kb / 11P
   Low Cost and Low Power I2C Bus??Real Time Clock/Calendar
ISL12058 INTERSIL-ISL12058 Datasheet
329Kb / 19P
   Low Cost and Low Power I2C-Bus??Real Time Clock/Calendar
logo
Renesas Technology Corp
ISL12058 RENESAS-ISL12058 Datasheet
837Kb / 20P
   Low Cost and Low Power I2C-Bus Real Time Clock/Calendar Low Power and Low Cost RTC with Alarm Function
logo
NXP Semiconductors
PCF8523 NXP-PCF8523_12 Datasheet
700Kb / 75P
   Real-Time Clock (RTC) and calendar
Rev. 4-5 July 2012
logo
Microchip Technology
MCP7940M-I MICROCHIP-MCP7940M-I Datasheet
1,006Kb / 38P
   Low-Cost I2C??Real-Time Clock/Calendar with SRAM
11/29/11
MCP7940M MICROCHIP-MCP7940M Datasheet
1,006Kb / 38P
   Low-Cost I2C??Real-Time Clock/Calendar with SRAM
11/29/11
logo
NXP Semiconductors
PCF8523 NXP-PCF8523 Datasheet
1Mb / 66P
   Real-Time Clock (RTC) and calendar
Rev. 3-30 March 2011
logo
Renesas Technology Corp
ISL12057 RENESAS-ISL12057 Datasheet
764Kb / 18P
   Low Cost and Low Power I2C RTC Real Time Clock/Calendar with Alarm Function and Dual IRQ Pins
ISL1208 RENESAS-ISL1208_V01 Datasheet
1Mb / 25P
   I2C Real Time Clock/Calendar, Low Power RTC with Battery Backed SRAM
Jul 15, 2022
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17


bảng dữ liệu tải về

Go To PDF Page


Link URL




Chính sách bảo mật
ALLDATASHEET.VN
Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com