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U1825N bảng dữ liệu(PDF) 1 Page - Texas Instruments |
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1 / 17 page UC1825 UC2825 UC3825 SLUS235A - MARCH 1997 - REVISED MARCH 2004 BLOCK DIAGRAM • Compatible with Voltage or Current Mode Topologies • Practical Operation Switching Frequencies to 1MHz • 50ns Propagation Delay to Output • High Current Dual Totem Pole Outputs (1.5A Peak) • Wide Bandwidth Error Amplifier • Fully Latched Logic with Double Pulse Suppression • Pulse-by-Pulse Current Limiting • Soft Start / Max. Duty Cycle Control • Under-Voltage Lockout with Hysteresis • Low Start Up Current (1.1mA) The UC1825 family of PWM control ICs is optimized for high fre- quency switched mode power supply applications. Particular care was given to minimizing propagation delays through the comparators and logic circuitry while maximizing bandwidth and slew rate of the error amplifier. This controller is designed for use in either cur- rent-mode or voltage mode systems with the capability for input volt- age feed-forward. Protection circuitry includes a current limit comparator with a 1V threshold, a TTL compatible shutdown port, and a soft start pin which will double as a maximum duty cycle clamp. The logic is fully latched to provide jitter free operation and prohibit multiple pulses at an output. An under-voltage lockout section with 800mV of hysteresis assures low start up current. During under-voltage lockout, the out- puts are high impedance. These devices feature totem pole outputs designed to source and sink high peak currents from capacitive loads, such as the gate of a power MOSFET. The on state is designed as a high level. High Speed PWM Controller FEATURES DESCRIPTION application INFO available UDG-92030-2 |
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