ADS8254

PIN FUNCTIONS (continued)

PIN

I/O

DESCRIPTION

NO

NAME

14

VCMO

O

This pin outputs Refin/2 and can be used to set common-mode voltage of differential analog inputs.

BUF-

15

O

Buffered reference output. Useful to level shift bipolar signals using external resistors.

REF

POWER CONTROL PINS

PD-

21

I

High on this pin powers down the reference buffer (BUF-REF).

RBUF

MULTIPLEXER CONTROL PINS

33

AUTO

I

High level on this pin selects ‘Auto’ mode for multiplexer scanning. Low level selects manual mode of multiplexer scanning

In auto mode (AUTO=1) multiplexer channel selection is reset to CH0 on rising edge of MXCLK while C3=1. The pin is 'do

34

C3

I

not care' in manual mode.

Acts as multiplexer address bit when AUTO=0 (Manual mode). In auto mode (AUTO=1) C2 and C1 select the last

35

C2

I

multiplexer channel (channel count) in the auto scan sequence.

Acts as multiplexer address LSB when AUTO=0 (Manual mode). In auto mode (AUTO=1) C2 and C1 select the last

36

C1

I

multiplexer channel (channel count) in the auto scan sequence.

Multiplexer channel is selected on rising edge of MXCLK irrespective of whether it is auto or manual mode. Device BUSY

37

MXCLK

I

output can be connected to MXCLK so that device selects next channel at the end of every sample.

ADC DATA BUS

8-BIT BUS

16-BIT BUS

42-49, 52-59

Data Bus

BYTE = 0

BYTE = 1

BYTE = 0

42

DB15

O

D15 (MSB)

D7

D15(MSB)

43

DB14

O

D14

D6

D14

44

DB13

O

D13

D5

D13

45

DB12

O

D12

D4

D12

46

DB11

O

D11

D3

D11

47

DB10

O

D10

D2

D10

48

DB9

O

D9

D1

D9

49

DB8

O

D8

D0

D8

52

DB7

O

D7

All ones

D7

53

DB6

O

D6

All ones

D6

54

DB5

O

D5

All ones

D5

55

DB4

O

D4

All ones

D4

56

DB3

O

D3

All ones

D3

57

DB2

O

D2

All ones

D2

58

DB1

O

D1

All ones

D1

59

DB0

O

D0 (LSB)

All ones

D0 (LSB)

ADC CONTROL PINS

62

BUSY

O

Status output. This pin is held high when device is converting.

1

BYTE

I

Byte Select Input. Used for 8-bit bus reading. Refer to the ADC DATA BUS description above.

2

CONVST

I

Convert start. This input is active low and can act independent of the CS\ input.

3

RD

I

Synchronization pulse for the parallel output.

4

CS

I

Chip Select.

DEVICE POWER SUPPLIES

22

VEE

Negative supply for OPA (OP1, OP2)

23, 24

VCC

Positive supply for OPA (OP1, OP2, BUF-REF)

5, 7, 13, 38,

+VA

Analog power supply.

40

6, 12, 26, 39,

AGND

Analog ground.

41

50, 63

+VBD

Digital Power Supply For ADC Bus.

51

BGND

Digital ground for ADC bus interface digital supply.

NOT CONNECTED PINS

16, 28, 60,

NC

No connection.

61, 64

10

Submit Documentation Feedback

Copyright © 2009, Texas Instruments Incorporated

Product Folder Link(s) :ADS8254