PIN ASSIGNMENTS

33 34 35

64

63

62

61

60

59

58

57

56

55

54

53

52

51

50

49

36

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

CH0P

CH0M

CH1P

CH1M

PD-RBUF

VEE

VCC

VCC

INP

AGND

37 38 39 40

15 14 13 12 11

16

10

8

7

6

9

41 42 43 44 45

5

4

3

2

1

46 47 48

QFNPACKAGE

(TOP VIEW)

INM

NC

CH2P

CH2M

CH3P

CH3M

DB8

+VBD

BGND

DB7

DB6

DB5

DB4

DB2

DB3

DB1

DB0

NC

NC

BUSY

+VBD

NC

ADS8254

ADS8254

PIN FUNCTIONS

PIN

I/O

DESCRIPTION

NO

NAME

MULTIPLEXER INPUT PINS

Non-inverting analog input for differential multiplexer channel number 0. Device performance is optimized for 50 ohm source

17

CH0P

I

impedance at this input.

Inverting analog input for differential multiplexer channel number 0. Device performance is optimized for 50 ohm source

18

CH0M

I

impedance at this input.

Non-inverting analog input for differential multiplexer channel number 1. Device performance is optimized for 50 ohm source

19

CH1P

I

impedance at this input.

Inverting analog input for differential multiplexer channel number 1. Device performance is optimized for 50 ohm source

20

CH1M

I

impedance at this input.

Non-inverting analog input for differential multiplexer channel number 2. Device performance is optimized for 50 ohm source

29

CH2P

I

impedance at this input.

Inverting analog input for differential multiplexer channel number 2. Device performance is optimized for 50 ohm source

30

CH2M

I

impedance at this input.

Non-inverting analog input for differential multiplexer channel number 3. Device performance is optimized for 50 ohm source

31

CH3P

I

impedance at this input.

Inverting analog input for differential multiplexer channel number 3. Device performance is optimized for 50 ohm source

32

CH3M

I

impedance at this input.

ADC INPUT PINS

25

INP

I

ADC Non inverting input., connect 1nF cap across INP and INM

27

INM

I

ADC Inverting input, connect 1nF cap across INP and INM

REFERENCE INPUT/ OUTPUT PINS

8, 9

REFM

I

Reference ground.

10

REFIN

I

Reference Input. Add 0.1-

µF decoupling capacitor between REFIN and REFM.

11

REFOUT

O

Reference Output. Add 1-

µF capacitor between the REFOUT pin and REFM pin when internal reference is used.

Copyright © 2009, Texas Instruments Incorporated

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