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SMDA05C-7 bảng dữ liệu(PDF) 5 Page - Semtech Corporation |
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SMDA05C-7 bảng dữ liệu(HTML) 5 Page - Semtech Corporation |
5 / 7 page 5 2004 Semtech Corp. www.semtech.com PROTECTION PRODUCTS PROTECTION PRODUCTS SMDA05C-7 THRU SMDA24C-7 Circuit Diagram Connection Diagram Device Connection for Protection of Seven Data Lines The SMDAxxC-7 is designed to protect up to 7 data or I/O lines. They are bidirectional devices and may be used on lines where the signal polarities are above and below ground. The SMDAxxC-7 TVS arrays employ a monolithic struc- ture. Therefore, the working voltage (V RWM) and break- down voltage (V BR) specifications apply to the differen- tial voltage between any two data line pins. For ex- ample, the SMDA24C-7 is designed for a maximum voltage excursion of ±12V between any two data lines. The device is connected as follows: Pins 1, 2, 3, 4, 5, 6 and 7 are connected to the lines that are to be protected. Pin 8 is connected to ground. The ground connections should be made directly to the ground plane for best results. The path length is kept as short as possible to reduce the effects of parasitic inductance in the board traces. Circuit Board Layout Recommendations for Suppres- sion of ESD. Good circuit board layout is critical for the suppression of ESD induced transients. The following guidelines are recommended: Place the TVS near the input terminals or connec- tors to restrict transient coupling. Minimize the path length between the TVS and the protected line. Minimize all conductive loops including power and ground loops. The ESD transient return path to ground should be kept as short as possible. Never run critical signals near board edges. Use ground planes whenever possible. 123 4 5 6 7 8 DATA IN DATA OUT DATA IN DATA OUT Applications Information |
Số phần tương tự - SMDA05C-7 |
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Mô tả tương tự - SMDA05C-7 |
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