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TDA18271HD bảng dữ liệu(PDF) 5 Page - NXP Semiconductors |
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TDA18271HD bảng dữ liệu(HTML) 5 Page - NXP Semiconductors |
5 / 69 page TDA18271HD_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 11 September 2008 5 of 69 NXP Semiconductors TDA18271HD Silicon Tuner IC LT 13 loop-through output GND 14 ground STO 15 slave tuner output VCC 16 3.3 V supply voltage CAPREGVCO 17 VCO supply decoupling VCC 18 3.3 V supply voltage MASTERSYNC 19 synchronization signal for dual tuner applications; leave open for single tuner applications CAPFILTVCO 20 VCO reference decoupling VT_COARSE 21 LO tuning voltage input VT_FINE 22 LO tuning voltage input GND 23 ground CP_LO 24 charge pump of the local synthesizer GND 25 ground XTALP 26 crystal oscillator input XTALN 27 crystal oscillator input FREEZE 28 synchronization signal for multi tuner applications; leave open for single tuner applications XTOUT_MS 29 XTOUT mode and master/slave selection XTOUTP 30 crystal oscillator output buffer XTOUTN 31 crystal oscillator output buffer AS 32 I2C-bus address selection input VCC 33 3.3 V supply voltage CP_CAL 34 charge pump of the calibration synthesizer VT_CAL 35 tuning voltage of the calibration synthesizer GND 36, 37 ground SCL 38 I2C-bus clock input SDA 39 I2C-bus data input/output CAPREG18 40 internal regulator decoupling GND 41 ground CAPREG28 42 internal regulator decoupling GND 43 ground VCC 44 3.3 V supply voltage IFOUTN 45 IF output IFOUTP 46 IF output V_IFAGC 47 IF gain control input GND 48 to 50 ground VSYNC 51 vertical synchronization input for analog applications; connect to ground for digital applications CAPREGFILTRF 52 internal regulator decoupling GND 53 to 64 ground GND exposed die ground Table 3. Pin description …continued Symbol Pin Description |
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