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TMP122AMDBVTEP bảng dữ liệu(PDF) 9 Page - Texas Instruments

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THERMOSTAT MODE (TM1/TM0)
POLARITY (POL)
FAULT QUEUE (F1/F0)
TMP122-EP
www.ti.com .......................................................................................................................................................................................... SBOS454 – NOVEMBER 2008
The Thermostat Mode bits of the TMP122 indicate to the device whether to operate in Comparator Mode,
Interrupt Mode or Interrupt Comparator Mode. For more information on Comparator and Interrupt Mode, see text
HIGH and LOW limit registers. The bit assignments for thermostat mode are described in Table 7. Power on
default is comparator mode.
Table 7. Mode Settings
TM1
TM0
MODE OF OPERATION
0
0
Comparator mode
0
1
Interrupt mode
1
0
Interrupt comparator mode
1
1
Reserved
The Polarity Bit of the TMP122 adjusts the polarity of the ALERT pin output. By default, POL = 0 and the ALERT
pin will be active LOW, as shown in Figure 8. For POL = 1 the ALERT Pin will be active HIGH, and the state of
the ALERT Pin is inverted.
Figure 8. ALERT Output Transfer Function Diagrams
A fault condition occurs when the measured temperature exceeds the limits set in the THIGH and TLOW registers.
The Fault Queue is provided to prevent a false alert due to environmental noise and requires consecutive fault
measurements to trigger the alert function of the TMP122. Table 8 defines the number of consecutive faults
required to trigger a consecutive alert condition. Power-on default for F1/F0 is 0/0.
Copyright © 2008, Texas Instruments Incorporated
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