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MC33810 bảng dữ liệu(PDF) 3 Page - Freescale Semiconductor, Inc |
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MC33810 bảng dữ liệu(HTML) 3 Page - Freescale Semiconductor, Inc |
3 / 35 page Analog Integrated Circuit Device Data Freescale Semiconductor 3 33810 PIN CONNECTIONS PIN CONNECTIONS Figure 3. 33810 Pin Connections Table 1. 33810 Pin Definitions A functional description of each pin can be found in the Functional Pin Description section beginning on page 13. Pin Number Pin Name Pin Function Formal Name Definition 8 VDD Input Digital Logic Supply Voltage The VDD input supply voltage determines the interface voltage levels between the device and the MCU, and is used to supply power to the Serial Out buffer (SO), SPKDUR buffer, MAXI, NOMI, and pull-up current source for the Chip Select (CS). 6 SI Input Serial Input Data The SI input pin is used to receive serial data from the MCU. 5 SCLK Input Serial Clock Input The SCLK input pin is used to clock in and out the serial data on the SI and SO pins, while being addressed by the CS. 4 CS Input Chip Select The Chip Select input pin is an active low signal sent by the MCU to indicate that the device is being addressed. This input requires CMOS logic levels and has an internal active pull-up current source. 7 SO Output Serial Output Data The SO output pin is used to transmit serial data from the device to the MCU. 10, 11, 12, 13 DIN0,DIN1, DIN2,DIN3 Input Driver Input 0, Driver Input 1, Driver Input 2, Driver Input 3 Active HIGH input control for injector outputs OUT0 - 3. The parallel input data is logically OR’d with the corresponding SPI input data register contents. 24, 23, 22, 21 GIN0,GIN1, GIN2,GIN3 Input Gate Driver Input 0 Gate Driver Input 1 Gate Driver Input 2 Gate Driver Input 3 These pins are the active HIGH input control for IGBT/General Purpose Gate Driver outputs 0 - 3. The parallel input data is logically OR'd with the corresponding SPI input data register contents in General Purpose Mode Only. 20 SPKDUR Output Spark Duration Output This pin is the Spark Duration Output. This open drain output is low while feedback inputs FB0 through FB3 are above the programmed spark detection threshold. 25 VPWR Input Analog Supply Voltage VPWR is the main voltage input for all internal analog bias circuitry. Exposed Pad (bottom of package) GND Ground Ground The exposed pad is the only ground reference for analog, digital and power ground connections. As such, it must be soldered directly to a low impedance ground plane for both electrical and thermal considerations. For more information about this package, please see application note AN2409 on the Freescale Website, www.freescale.com GND OUT0 FB0 GD0 CS SCLK SI SO VDD OUTEN DIN0 DIN1 DIN2 DIN3 GD1 FB1 OUT1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OUT2 FB2 GD2 MAXI NOMI RSN RSP VPWR GIN0 GIN1 GIN2 GIN3 SPKDUR GD3 FB3 OUT3 |
Số phần tương tự - MC33810_08 |
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Mô tả tương tự - MC33810_08 |
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