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AD5522JSVDZ bảng dữ liệu(PDF) 1 Page - Analog Devices |
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1 / 60 page Quad Parametric Measurement Unit with Integrated 16-Bit Level Setting DACs AD5522 Rev. Info res righ license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. .A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. A rmation furnished by Analog Devices is believed to be accurate and reliable. However, no ponsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother tsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S FEATURES Quad parametric measurement unit (PMU) FV, FI, FN (high-Z), MV, MI functions 4 programmable current ranges (internal RSENSE) ±5 μA, ±20 μA, ±200 μA, and ±2 mA 1 programmable current range up to ±80 mA (external RSENSE) 22.5 V FV range with asymmetrical operation Integrated 16-bit DACs provide programmable levels Gain and offset correction on chip Low capacitance outputs suited to relayless systems On-chip comparators per channel FI voltage clamps and FV current clamps Guard drive amplifier System PMU connections Programmable temperature shutdown SPI- and LVDS-compatible interfaces Compact 80-lead TQFP with exposed pad (top or bottom) APPLICATIONS Automated test equipment (ATE) Per-pin parametric measurement unit Continuity and leakage testing Device power supply Instrumentation Source measure unit (SMU) Precision measurement FUNCTIONAL BLOCK DIAGRAM 16 16 16 DUTGND MEASVH[0:3] GUARD[0:3] CGALM SCLK SYNC SDI SDO CPOL0/ SCLK CPOL2/ CPO0 CPOH2/ CPO1 CPOL3/ CPO2 CPOH3/ CPO3 SERIAL INTERFACE CPOH0/ SDI CPOL1/ SYNC CPOH1/ SDO SPI/ LVDS RESET BUSY 16 CLAMP AND GUARD ALARM TEMP SENSOR POWER-ON RESET GUARDIN[0:3]/ DUTGND[0:3] DUT EXTERNA L RSENSE (CURRENTS UP TO ±80mA) EXTMEASIH[0:3] EXTMEASIL[0:3] FOH[0:3] CLL AGND + – MEASOUT[0:3] EXTFOH[0:3] CFF[0:3] FIN CLH AVSS AVDD ×4 DGND CPH COMPARATOR CCOMP[0:3] LOAD CPL SYS_FORCE SYS_SENSE DVCC AGND INTERNAL RANGE SELECT (±5µA, ±20µA, ±200µA, ±2mA) – – – – + + – + – + + + RSENSE – – + + 16 16 16 16 16 VREF 16 X1 REG C REG M REG 16 16 16 16 16 16 16 16-BIT FIN DAC ×5 or ×10 ×1 TMPALM ×2 AGND 16-BIT CLH DAC MEASOUT MUX AND GAIN ×1/×0.2 X1 REG C REG M REG X1 REG C REG M REG 16 ×2 16 16 16 16 X1 REG C REG M REG ×6 ×6 16-BIT OFFSET DAC REFGND OFFSET DAC TO ALL DAC OUTPUT AMPLIFIERS FORCE AMPLIFIER 16-BIT CLL DAC 16-BIT CPH DAC 16-BIT CPL DAC SW2 SW4 SW6 SW5 SW9 SW8 SW10 SW11 MEASURE VOLTAGE IN-AMP MEASURE CURRENT IN-AMP TEMP SENSOR SW1 SW3 60 Ω TO MEASOUT MUX SW12 X1 REG C REG M REG ×6 EN 1k Ω X2 REG ×2 X2 REG X2 REG ×6 X2 REG X2 REG ×6 ×6 ×2 GUARD AMP SW13 SW14 AGND 10k Ω SW15 SW16 DUTGND VMID TO CENTER I RANGE + – AGND SW7 4k Ω 2k Ω MEASVH (Hi-Z) 4k Ω Figure 1. |
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