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AD1937WBSTZ-RL bảng dữ liệu(PDF) 1 Page - Analog Devices |
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AD1937WBSTZ-RL bảng dữ liệu(HTML) 1 Page - Analog Devices |
1 / 36 page Four ADCs/Eight DACs with PLL, 192 kHz, 24-Bit Codec AD1937 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. FEATURES PLL-generated clock or direct master clock Low EMI design 112 dB DAC/107 dB ADC dynamic range and SNR −96 dB THD + N Single 3.3 V supply Tolerance for 5 V logic inputs Supports 24-bits and 8 kHz to 192 kHz sample rates Differential ADC input Differential DAC output Log volume control with autoramp function I2C-controllable for flexibility Software-controllable clickless mute Software power-down Right-justified, left-justified, I2S, and TDM modes Master and slave modes up to 16-channel input/output Available in a 64-lead LQFP AECQ-100 qualified APPLICATIONS Automotive audio systems Home theater systems Set-top boxes Digital audio effects processors GENERAL DESCRIPTION The AD1937 is a high performance, single-chip codec that provides four analog-to-digital converters (ADCs) with differential input and eight digital-to-analog converters (DACs) with differential output, using the Analog Devices, Inc., patented multibit sigma- delta (Σ-Δ) architecture. An I2C® port is included, allowing a microcontroller to adjust volume and many other parameters. The AD1937 operates from 3.3 V digital and analog supplies. The AD1937 is available in a 64-lead (differential output) LQFP. The AD1937 is designed for low EMI. This consideration is apparent in both the system and circuit design architectures. By using the on-board PLL to derive the master clock from the LR (frame) clock or from an external crystal, the AD1937 elimi- nates the need for a separate high frequency master clock and can also be used with a suppressed bit clock. The DACs and ADCs are designed using the latest Analog Devices continuous time architecture to further minimize EMI. By using 3.3 V supplies, power consumption is minimized and further reduces emissions. FUNCTIONAL BLOCK DIAGRAM DIGITAL FILTER SERIAL DATA PORT DIGITAL AUDIO INPUT/OUTPUT PRECISION VOLTAGE REFERENCE TIMING MANAGEMENT AND CONTROL (CLOCK AND PLL) I2C CONTROL PORT CONTROL DATA INPUT/OUTPUT AD1937 ADC ADC ADC ADC ANALOG AUDIO INPUTS ANALOG AUDIO OUTPUTS DAC DAC DAC DAC DAC DAC DAC DAC DIGITAL FILTER AND VOLUME CONTROL SDATA OUT SDATA IN CLOCKS Figure 1. |
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