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SI1551DL-T1 bảng dữ liệu(PDF) 2 Page - Vishay Siliconix |
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SI1551DL-T1 bảng dữ liệu(HTML) 2 Page - Vishay Siliconix |
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2 / 8 page  Si1551DL Vishay Siliconix www.vishay.com 2 Document Number: 71255 S-42353—Rev. C, 20-Dec-04 SPECIFICATIONS (TJ = 25_C UNLESS OTHERWISE NOTED) Parameter Symbol Test Condition Min Typ Max Unit Static Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250 mA N-Ch 0.6 1.5 V Gate Threshold Voltage VGS(th) VDS = VGS, ID = −250 mA P-Ch −0.6 −1.5 V Gate Body Leakage IGSS VDS = 0 V VGS = "12 V N-Ch "100 nA Gate-Body Leakage IGSS VDS = 0 V, VGS = "12 V P-Ch "100 nA VDS = 20 V, VGS = 0 V N-Ch 1 Zero Gate Voltage Drain Current IDSS VDS = −20 V, VGS = 0 V P-Ch −1 mA Zero Gate Voltage Drain Current IDSS VDS = 20 V, VGS = 0 V, TJ = 85_C N-Ch 5 mA VDS = −20 V, VGS = 0 V, TJ = 85_C P-Ch −5 On State Drain Currenta ID( ) VDS w 5 V, VGS = 4.5 V N-Ch 0.6 A On-State Drain Currenta ID(on) VDS p −5 V, VGS = −4.5 V P-Ch −1.0 A VGS = 4.5 V, ID = 0.29 A N-Ch 1.55 1.9 VGS = −4.5 V, ID = −0.41 A P-Ch 0.850 0.995 Drain Source On State Resistancea rDS( ) VGS = 2.7 V, ID = 0.1 A N-Ch 2.8 3.7 W Drain-Source On-State Resistancea rDS(on) VGS = −2.7 V, ID = −0.25 A P-Ch 1.23 1.600 W VGS = 2.5 V, ID = 0.1 A N-Ch 3.0 4.2 VGS = −2.5 V, ID = −0.25 A P-Ch 1.4 1.800 Forward Transconductancea gf VDS = 10 V, ID = 0.29 A N-Ch 0.3 S Forward Transconductancea gfs VDS = −10 V, ID = −0.41 A P-Ch 0.8 S Diode Forward Voltagea VSD IS = 0.23 A, VGS = 0 V N-Ch 0.8 1.2 V Diode Forward Voltagea VSD IS = −0.23 A, VGS = 0 V P-Ch −0.8 −1.2 V Dynamicb Total Gate Charge Qg N-Ch 0.72 1.5 Total Gate Charge Qg N-Channel P-Ch 0.52 1.8 Gate Source Charge Q N-Channel VDS = 10 V, VGS = 4.5 V, ID = 0.29 A N-Ch 0.22 nC Gate-Source Charge Qgs P-Channel V 10 V V 45 V I 0 41 A P-Ch 0.11 nC Gate Drain Charge Q d VDS = −10 V, VGS = −4.5 V, ID = −0.41 A N-Ch 0.13 Gate-Drain Charge Qgd P-Ch 0.14 Turn On Delay Time td( ) N-Ch 23 40 Turn-On Delay Time td(on) P-Ch 7.5 15 Rise Time t N-Channel VDD = 10 V, RL = 20 W N-Ch 30 60 Rise Time tr VDD = 10 V, RL = 20 W ID ^ 0.5 A, VGEN = 4.5 V, Rg = 6 W P-Ch 20 40 Turn Off Delay Time td( ff) g P-Channel V 10 V R 20 W N-Ch 10 20 ns Turn-Off Delay Time td(off) VDD = −10 V, RL = 20 W ID ^ −0.5 A, VGEN = −4.5 V, Rg = 6 W P-Ch 8.5 17 ns Fall Time tf ID ^ 0.5 A, VGEN = 4.5 V, Rg = 6 W N-Ch 15 30 Fall Time tf P-Ch 12 24 Source-Drain t IF = 0.23 A, di/dt = 100 A/ms N-Ch 20 40 Source-Drain Reverse Recovery Time trr IF = −0.23 A, di/dt = 100 A/ms P-Ch 25 40 Notes a. Pulse test; pulse width v 300 ms, duty cycle v 2%. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. |
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