LC07422T

No.A0908-6/10

General specifications (* fs = sampling frequency)

Audio block

• ΔΣ type 16-bit stereo ADC

: THD+N = 80dB (typ, with -1dBfs input)

• ΔΣ type 16-bit stereo DAC

: THD+N = 80dB (typ, with 0dBfs input)

• PGA for ALC/limiter

: Amplifier gain => +34 to -14dB (in 0.5dB steps)

• EVR (analog volume)

: Amplifier gain => 0 to -65dB

(The gain can be varied in steps from approx. 0.1 to 3.0dB; see characteristics diagram.)

• Line output

: Built-in pop noise suppression circuit

• Speaker amplifier (monaural) : BTL drive, 250mW (3dBV, VDD = 2.8V, 8Ω, THD+N = 1%)

• Headphone amplifier

: Output level => 2dBV (typ, 108

Ω, VDDh = 4.8V)

• Sampling frequency

: 48, 32kHz (44.1kHz supported by DAC only)

• Audio data format

I

Video block

• No need for output coupling capacitor, no generation of V sag

• LPF

: fc = 8MHz

• Amplifier gain

: 6.5dB

±1.7dB, 0.1dB/step

• 75Ω driver

: 3 systems (Y, C, V)

Common units

• Master clock (MCLK pin input)

: 256fs or 512fs, duty ratio = 50% (typ)

• Microcontroller serial data format (register settings) : 3-line system

(Chip select, clock, data)

The maximum clock frequency is (1/4) MCLK.

Video driver circuit

Headphone amplifier circuit

CPminusO

CPn

CPp

Cin

CPref_C

Yin

HDin

CPminusI

[VD_SDC_SW]

SDCout

11

Hi-Z

10

VDDh

01

2.3V

00

0.0V

Charge Pump

LPF

Yout

Vref(+aV)

+aV

LPF

+

Vout

Cout

SDC circuit

PGA

SDCout

CLAMP

-aV

100

Ω

H.P.

8

Ω

HPout_L/HPout_R

HPt_C