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STV7801S bảng dữ liệu(PDF) 6 Page - STMicroelectronics |
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STV7801S bảng dữ liệu(HTML) 6 Page - STMicroelectronics |
6 / 18 page STV7801S 6/18 6 - POWER ON SEQUENCE If Vpp is switched ON before Vdd, the circuit remains in Tri-State mode until Vdd reaches Vdd threshold. If Vddis switched ON before Vpp, the circuit remains in Tri-State mode until Vpp reaches Vpp threshold. 7 - ABSOLUTE MAXIMUM RATINGS Note 1 Peak current as defined in Figure 1 on page 9 Note 2 These parameters are measured during ST’s internal qualification which includes temperature characterization on standard and corner batches of the process. These parameters are not tested on the parts. Remark: ESD susceptibility Human body Model: 100pF, 1.5k Ω Vpp pin (14-15: Multiwatt 15) VESD= 200V DM-LH pin (9: Multiwatt 15) VESD=400V By connecting a 1nF decoupling capacitor, the circuit withstands VESD=2.2kV on all pins. 8 - THERMAL DATA Note 3 Multilayer PCB. Note 4 Package floating in the air. Symbol Parameter Value Unit Vdd Logic Supply Range -0.3,+14 V Vpp Driver Supply Range -0.3 , + 100 V VIn Logic Input Voltage Range -0.3, Vdd+0.3 °C Ih-Out Main Switch High Side Current -5 A Il-Out Main Switch Low Side Current 5 A Ipr-Hi Power Recovery Current (note1)-7 A Ipr-Lo Power Recovery current (note1)7 A VCBoot-Vout Difference between Boot voltage and output voltage 14 V Tjmax Maximum Junction Temperature (note2) Internally protected °C Top Operating Temperature Range -20, +70 °C Tstg Storage Temperature Range -50, +150 °C Symbol Parameter Value Unit PowerSO20 MW15 Rth(j-a) Junction - Ambient Thermal Resistance 40(note3) 35 (note4)°C/W Rth(j-c) Junction - Case Thermal Resistance +0.6, +2.5 -0.6, +2.4 |
Số phần tương tự - STV7801S |
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Mô tả tương tự - STV7801S |
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