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MCF5208CAB166 bảng dữ liệu(PDF) 7 Page - Freescale Semiconductor, Inc

tên linh kiện MCF5208CAB166
Giải thích chi tiết về linh kiện  ColdFire짰 Microprocessor
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Signal Descriptions
MCF5208 ColdFire® Microprocessor Data Sheet, Rev. 1
Freescale Semiconductor
7
ALLPST
O
EVDD
67
73
Test
TEST7
I
EVDD
109
——
C12
PLL_TEST
I
EVDD
——
M13
Power Supplies
EVDD
1, 33, 63, 66,
72, 81, 87,
125
E5–E6, F5,
G8–G9,
H7–H8
2, 9, 69, 72,
80, 89, 95,
131
E5–E7, F5,
F6, G5, H10,
J9, J10,
K8–K10,
K13, M9
IVDD
30, 68, 84,
113, 143
D4, D8, H4,
H11, J9
36, 74, 92,
121, 159
J12, D4,
D11, H11,
L4, L11,
PLL_VDD
86
H12
94
H13
SD_VDD
3, 17, 35, 61,
89, 110, 123
E7–E8, F8,
G5, H5–H6,
J3
11, 39, 41,
67, 97, 118,
129
E8–E10, F9,
F10, G10,
H5, J5, J6,
K5–K7, L2
VSS
2, 16, 36, 62,
65, 73, 88,
111, 124
D10, F6–F7,
G6–G7
1, 10, 42, 68,
71, 81, 96,
117, 119,
130
A1, A14,
F7–F8,
G6–G9,
H6–H9,
J7–J8, L13,
M2, N9, P1,
P14
PLL_VSS
85
—93
H12
NOTES:
1
Refers to pin’s primary function.
2
Pull-up enabled internally on this signal for this mode.
3
The SDRAM functions of these signals are not programmable by the user. They are dynamically switched by the processor when
accessing SDRAM memory space and are included here for completeness.
4
Primary functionality selected by asserting the DRAMSEL signal (SDR mode). Alternate functionality selected by negating the
DRAMSEL signal (DDR mode). The GPIO module is not responsible for assigning these pins.
5
GPIO functionality is determined by the edge port module. The GPIO module is only responsible for assigning the alternate functions.
6
If JTAG_EN is asserted, these pins default to Alternate 1 (JTAG) functionality. The GPIO module is not responsible for assigning
these pins.
7
Pull-down enabled internally on this signal for this mode.
Table 3. MCF5207/8 Signal Information and Muxing (continued)
Signal Name
GPIO
Alternate 1
Alternate 2
MCF5207
144
LQFP
MCF5207
144
MAPBGA
MCF5208
160
QFP
MCF5208
196
MAPBGA


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