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MCF52235DS bảng dữ liệu(PDF) 2 Page - Freescale Semiconductor, Inc |
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MCF52235DS bảng dữ liệu(HTML) 2 Page - Freescale Semiconductor, Inc |
2 / 54 page MCF52235 ColdFire Microcontroller Data Sheet, Rev. 7 Freescale Semiconductor 2 Table of Contents 1 MCF52235 Family Configurations . . . . . . . . . . . . . . . . . . . . . .3 1.1 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 1.3 Reset Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 1.4 PLL and Clock Signals . . . . . . . . . . . . . . . . . . . . . . . . .22 1.5 Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 1.6 External Interrupt Signals . . . . . . . . . . . . . . . . . . . . . . .22 1.7 Queued Serial Peripheral Interface (QSPI) . . . . . . . . . .23 1.8 Fast Ethernet Controller EPHY Signals . . . . . . . . . . . .23 1.9 I2C I/O Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 1.10 UART Module Signals . . . . . . . . . . . . . . . . . . . . . . . . . .24 1.11 DMA Timer Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 1.12 ADC Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 1.13 General Purpose Timer Signals . . . . . . . . . . . . . . . . . .25 1.14 Pulse Width Modulator Signals . . . . . . . . . . . . . . . . . . .25 1.15 Debug Support Signals . . . . . . . . . . . . . . . . . . . . . . . . .25 1.16 EzPort Signal Descriptions . . . . . . . . . . . . . . . . . . . . . .27 1.17 Power and Ground Pins . . . . . . . . . . . . . . . . . . . . . . . .27 2 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 2.1 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 2.2 ESD Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 2.3 DC Electrical Specifications . . . . . . . . . . . . . . . . . . . . .32 2.4 Phase Lock Loop Electrical Specifications . . . . . . . . . .33 2.5 General Purpose I/O Timing . . . . . . . . . . . . . . . . . . . . .35 2.6 Reset Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 2.7 I2C Input/Output Timing Specifications . . . . . . . . . . . . .36 2.8 EPHY Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . .38 2.9 Analog-to-Digital Converter (ADC) Parameters . . . . . .40 2.10 DMA Timers Timing Specifications . . . . . . . . . . . . . . . .42 2.11 EzPort Electrical Specifications . . . . . . . . . . . . . . . . . .42 2.12 QSPI Electrical Specifications. . . . . . . . . . . . . . . . . . . .43 2.13 JTAG and Boundary Scan Timing . . . . . . . . . . . . . . . . .44 2.14 Debug AC Timing Specifications. . . . . . . . . . . . . . . . . .46 3 Mechanical Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . .47 3.1 80-pin LQFP Package. . . . . . . . . . . . . . . . . . . . . . . . . .47 3.2 112-pin LQFP Package . . . . . . . . . . . . . . . . . . . . . . . . .48 3.3 121 MAPBGA Package . . . . . . . . . . . . . . . . . . . . . . . . .51 4 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53 List of Figures Figure 1. MCF52235 Block Diagram . . . . . . . . . . . . . . . . . . . . . . 4 Figure 2. 80-pin LQFP Pin Assignments . . . . . . . . . . . . . . . . . . 14 Figure 3. 112-pin LQFP Pin Assignments . . . . . . . . . . . . . . . . . 15 Figure 4. 121 MAPBGA Pin Assignments . . . . . . . . . . . . . . . . . 16 Figure 5. Suggested Connection Scheme for Power and Ground 28 Figure 6. GPIO Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 7. RSTI and Configuration Override Timing . . . . . . . . . . 36 Figure 8. I2C Input/Output Timings . . . . . . . . . . . . . . . . . . . . . . 37 Figure 9. EPHY Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 10.10BASE-T SQE (Heartbeat) Timing . . . . . . . . . . . . . 39 Figure 11.10BASE-T Jab and Unjab Timing . . . . . . . . . . . . . . . 39 Figure 12.Equivalent Circuit for A/D Loading. . . . . . . . . . . . . . . 42 Figure 13.QSPI Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 14.Test Clock Input Timing . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 15.Boundary Scan (JTAG) Timing . . . . . . . . . . . . . . . . . 45 Figure 16.Test Access Port Timing . . . . . . . . . . . . . . . . . . . . . . 45 Figure 17.TRST Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Figure 18.Real-Time Trace AC Timing . . . . . . . . . . . . . . . . . . . . 46 Figure 19.BDM Serial Port AC Timing . . . . . . . . . . . . . . . . . . . . 46 List of Tables Table 1. MCF52235 Family Configurations . . . . . . . . . . . . . . . . . 3 Table 2. Orderable Part Number Summary . . . . . . . . . . . . . . . . 13 Table 3. Pin Functions by Primary and Alternate Purpose . . . . 17 Table 4. Reset Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 5. PLL and Clock Signals . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 6. Mode Selection Signals . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 7. External Interrupt Signals . . . . . . . . . . . . . . . . . . . . . . 22 Table 8. Queued Serial Peripheral Interface (QSPI) Signals. . . 23 Table 9. Fast Ethernet Controller (FEC) Signals . . . . . . . . . . . . 23 Table 10.I2C I/O Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 11.UART Module Signals . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 12.DMA Timer Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 13.ADC Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 14.GPT Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 15.PWM Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 16.Debug Support Signals . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 17.EzPort Signal Descriptions . . . . . . . . . . . . . . . . . . . . . 27 Table 18.Power and Ground Pins. . . . . . . . . . . . . . . . . . . . . . . . 27 Table 19.Absolute Maximum Ratings, . . . . . . . . . . . . . . . . . . . 29 Table 20.Thermal Characteristics. . . . . . . . . . . . . . . . . . . . . . . . 30 Table 21.ESD Protection Characteristics . . . . . . . . . . . . . . . . . . 31 Table 22.DC Electrical Specifications . . . . . . . . . . . . . . . . . . . . 32 Table 23.Active Current Consumption Specifications. . . . . . . . . 33 Table 24.Current Consumption Specifications in Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 25.PLL Electrical Specifications . . . . . . . . . . . . . . . . . . . . 33 Table 26.GPIO Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 27.Reset and Configuration Override Timing . . . . . . . . . . 35 Table 28.I2C Input Timing Specifications between I2C_SCL and I2C_SDA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 29. I2C Output Timing Specifications between I2C_SCL and I2C_SDA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 30.EPHY Timing Parameters . . . . . . . . . . . . . . . . . . . . . . 38 Table 31.10BASE-T SQE (Heartbeat) Timing Parameters . . . . 38 Table 32.10BASE-T Jab and Unjab Timing Parameters . . . . . . 39 Table 33.10BASE-T Transceiver Characteristics . . . . . . . . . . . . 40 Table 34.100BASE-TX Transceiver Characteristics . . . . . . . . . . 40 Table 35.ADC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 36.Timer Module AC Timing Specifications . . . . . . . . . . . 42 Table 37.EzPort Electrical Specifications . . . . . . . . . . . . . . . . . . 42 Table 38.QSPI Modules AC Timing Specifications. . . . . . . . . . . 43 Table 39.JTAG and Boundary Scan Timing . . . . . . . . . . . . . . . . 44 Table 40.Debug AC Timing Specification . . . . . . . . . . . . . . . . . . 46 Table 41.Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 |
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