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MC9S08DZ16F1C48 bảng dữ liệu(PDF) 10 Page - Freescale Semiconductor, Inc

tên linh kiện MC9S08DZ16F1C48
Giải thích chi tiết về linh kiện  8-Bit HCS08 Central Processor Unit (CPU)
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MC9S08DZ16F1C48 bảng dữ liệu(HTML) 10 Page - Freescale Semiconductor, Inc

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MC9S08DZ60 Series Data Sheet, Rev. 4
10
Freescale Semiconductor
Section Number
Title
Page
4.5.2
Program and Erase Times .................................................................................................53
4.5.3
Program and Erase Command Execution .........................................................................53
4.5.4
Burst Program Execution ..................................................................................................55
4.5.5
Sector Erase Abort ............................................................................................................57
4.5.6
Access Errors ....................................................................................................................58
4.5.7
Block Protection ................................................................................................................59
4.5.8
Vector Redirection ............................................................................................................59
4.5.9
Security .............................................................................................................................59
4.5.10 EEPROM Mapping ...........................................................................................................61
4.5.11 Flash and EEPROM Registers and Control Bits ...............................................................61
Chapter 5
Resets, Interrupts, and General System Control
5.1
Introduction ......................................................................................................................................69
5.2
Features ............................................................................................................................................69
5.3
MCU Reset .......................................................................................................................................69
5.4
Computer Operating Properly (COP) Watchdog..............................................................................70
5.5
Interrupts ..........................................................................................................................................71
5.5.1
Interrupt Stack Frame .......................................................................................................72
5.5.2
External Interrupt Request (IRQ) Pin ...............................................................................72
5.5.3
Interrupt Vectors, Sources, and Local Masks ....................................................................73
5.6
Low-Voltage Detect (LVD) System .................................................................................................75
5.6.1
Power-On Reset Operation ...............................................................................................75
5.6.2
Low-Voltage Detection (LVD) Reset Operation ...............................................................75
5.6.3
Low-Voltage Warning (LVW) Interrupt Operation ...........................................................75
5.7
MCLK Output ..................................................................................................................................75
5.8
Reset, Interrupt, and System Control Registers and Control Bits ....................................................76
5.8.1
Interrupt Pin Request Status and Control Register (IRQSC) ............................................77
5.8.2
System Reset Status Register (SRS) .................................................................................78
5.8.3
System Background Debug Force Reset Register (SBDFR) ............................................79
5.8.4
System Options Register 1 (SOPT1) ................................................................................80
5.8.5
System Options Register 2 (SOPT2) ................................................................................81
5.8.6
System Device Identification Register (SDIDH, SDIDL) ................................................82
5.8.7
System Power Management Status and Control 1 Register (SPMSC1) ...........................83
5.8.8
System Power Management Status and Control 2 Register (SPMSC2) ...........................84
Chapter 6
Parallel Input/Output Control
6.1
Port Data and Data Direction ...........................................................................................................85
6.2
Pull-up, Slew Rate, and Drive Strength............................................................................................86
6.3
Pin Interrupts ....................................................................................................................................87
6.3.1
Edge Only Sensitivity .......................................................................................................87


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