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MC9S08LC60C80E bảng dữ liệu(PDF) 10 Page - Freescale Semiconductor, Inc

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Giải thích chi tiết về linh kiện  8-Bit HCS08 Central Processor Unit (CPU)
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MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
10
Freescale Semiconductor
Section Number
Title
Page
Chapter 4
Memory
4.1
MC9S08LC60 Series Memory Map ...............................................................................................39
4.1.1
Reset and Interrupt Vector Assignments ........................................................................40
4.2
Register Addresses and Bit Assignments ........................................................................................42
4.3
RAM ................................................................................................................................................47
4.4
FLASH ............................................................................................................................................48
4.4.1
Features ...........................................................................................................................49
4.4.2
Program and Erase Times ...............................................................................................49
4.4.3
Program and Erase Command Execution .......................................................................50
4.4.4
Burst Program Execution ...............................................................................................51
4.4.5
Access Errors ..................................................................................................................53
4.4.6
FLASH Block Protection ...............................................................................................53
4.4.7
Vector Redirection ..........................................................................................................54
4.5
Security ............................................................................................................................................54
4.6
FLASH Registers and Control Bits .................................................................................................56
4.6.1
FLASH Clock Divider Register (FCDIV) ......................................................................56
4.6.2
FLASH Options Register (FOPT and NVOPT) .............................................................57
4.6.3
FLASH Configuration Register (FCNFG) .....................................................................58
4.6.4
FLASH Protection Register (FPROT and NVPROT) ....................................................58
4.6.5
FLASH Status Register (FSTAT) ...................................................................................60
4.6.6
FLASH Command Register (FCMD) ............................................................................61
Chapter 5
Resets, Interrupts, and System Configuration
5.1
Introduction .....................................................................................................................................63
5.2
Features ...........................................................................................................................................63
5.3
MCU Reset ......................................................................................................................................63
5.4
Computer Operating Properly (COP) Watchdog .............................................................................64
5.5
Interrupts .........................................................................................................................................65
5.5.1
Interrupt Stack Frame .....................................................................................................66
5.5.2
External Interrupt Request (IRQ) Pin .............................................................................67
5.5.2.1
Pin Configuration Options ..............................................................................67
5.5.2.2
Edge and Level Sensitivity ..............................................................................67
5.5.3
Interrupt Vectors, Sources, and Local Masks .................................................................67
5.6
Low-Voltage Detect (LVD) System ................................................................................................69
5.6.1
Power-On Reset Operation .............................................................................................69
5.6.2
LVD Reset Operation .....................................................................................................69
5.6.3
LVD Interrupt Operation ................................................................................................69
5.6.4
Low-Voltage Warning (LVW) ........................................................................................69
5.7
Real-Time Interrupt (RTI) ...............................................................................................................69
5.8
Reset, Interrupt, and System Control Registers and Control Bits ...................................................70
5.8.1
Interrupt Pin Request Status and Control Register (IRQSC) .........................................70
5.8.2
System Reset Status Register (SRS) ...............................................................................72


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