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MC33298 bảng dữ liệu(PDF) 19 Page - Freescale Semiconductor, Inc

tên linh kiện MC33298
Giải thích chi tiết về linh kiện  Eight Output Switch with Serial Peripheral Interface I/O
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
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MC33298 bảng dữ liệu(HTML) 19 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
19
33298
FUNCTIONAL DESCRIPTION
FAULT LOGIC OPERATION
FAULT LOGIC OPERATION
INTRODUCTION
The MCU can perform a parity check of the fault logic
operation by comparing the command 8-bit word to the status
8-bit word. Assume after system reset, the MCU first sends
an 8-bit command word to the 33298. This word is called
Command Word 1. Each output to be turned ON will have its
corresponding data bit low. Refer to the data transfer timing
illustration in Figure 18.
As Command Word 1 is being written into the Shift register
of the 33298, a status word is being simultaneously written
and received by the MCU. However, the word being received
by the MCU is the status of the previous write word to the
33298, Status Word 0. If the command word of the MCU is
written a second time (Command Word 2 = Command Word
1), the word received by the MCU, Status Word 2, is the
status of Command Word 1. The timing diagram illustrated in
Figure 18 depicts this operation. Status Word 2 is then
compared with Command Word 1. The MCU will Exclusive
OR Status Word 2 with Command Word 1 to determine if the
two words are identical. If the two words are identical, faults
do not exist. The timing between the two write words must be
greater than 100µs to receive proper drain status. The
system data bus integrity may be tested by writing two like
words to the 33298 within a few microseconds of each other.
INITIAL SYSTEM SETUP TIMING
The MCU can monitor two kinds of faults:
1. Communication errors on the data bus
2. Actual faults of the output loads
After initial system start up or reset, the MCU will write one
word to the 33298. If the word is repeated within
approximately five microseconds of the first word, the word
received by the MCU, at the end of the repeated word, serves
as a confirmation of data bus integrity (1). At start up, the
33298 will take 25 to 100µs before a repeat of the first word
should be repeated at least 100µs later to verify the status of
the outputs.
The SO of the 33298 will indicate any one of four faults.
The four possible faults are:
1. Over-temperature
2. Output OFF Open Fault
3. Short Fault (over-current)
4. VPWR Over-voltage Fault.
All of these faults, with the exception of the Over-voltage
Fault, are output specific. Over-temperature Detect, Output
OFF Open Detect, and Output Short Detect are dedicated to
each output separately such that the outputs are independent
in operation. A VPWR Over-voltage Detect is a global nature
causing all outputs to be turned OFF.
OVER-TEMPERATURE FAULT
Patent pending Over-temperature Detect and shutdown
circuits are specifically incorporated for each individual
output. The shutdown following an Over-temperature
condition is independent of the system clock and other logic
signal. Each independent output shuts down at 155°C to
185°C. When an output shuts down due to an Over-
temperature Fault, no other outputs are affected. The MCU
recognizes the fault since the output was commanded to be
ON and the status word indicates it is OFF. A maximum
hysteresis of 20°C ensures an adequate time delay between
output turn OFF and recovery. This avoids a very rapid turn
ON and turn OFF of the device around the Over-temperature
threshold. When the temperature falls below the recovery
level for the Over-temperature Fault, the device will turn on
only if the Command Word during the next write cycle
indicates the output should be turned ON.
OVER-VOLTAGE FAULT
An Over-voltage condition on the VPWR pin causes the
33298 to shut-down all outputs until the over-voltage
condition is removed and the device is re-programmed by the
SPI. The over-voltage threshold on the VPWR pin is specified
as 28V to 36V with 1.0V typical hysteresis. Following the over
voltage condition, the next write cycle sends the SO pin the
hexadecimal word $FF (all ones) indicating all outputs are
turned off. In this way, potentially dangerous timing problems
are avoided and the MCU reset routine ensures an orderly
startup of the loads. The 33298 does not detect an over-
voltage on the VDD pin. Other external circuitry, such as a
universal voltage monitor, is necessary to accomplish this
function.
OUTPUT OFF OPEN LOAD FAULT
An Output OFF Open Load Fault is the detection and
reporting of an open load when the corresponding output is
disabled (input in a logic high state). To understand the
operation of the Open Load Fault detect circuit; see
Figure 19. The Output OFF Open Load Fault is detected by
comparing the drain voltage of the specific MOSFET output
to an internally generated reference. Each output has one
dedicated comparator for this purpose.


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