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MC13201FCR2 bảng dữ liệu(PDF) 11 Page - Freescale Semiconductor, Inc

tên linh kiện MC13201FCR2
Giải thích chi tiết về linh kiện  2.4 GHz Low Power Transceiver for the IEEE 802.15.4 Standard
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
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MC13201 Technical Data, Rev. 1.3,
Freescale Semiconductor
11
6.2
Serial Peripheral Interface (SPI)
The host microcontroller directs the MC13201, checks its status, and reads/writes data to the device
through the 4-wire SPI port. The transceiver operates as a SPI slave device only. A transaction between
the host and the MC13201 occurs as multiple 8-bit bursts on the SPI. The SPI signals are:
1. Chip Enable (CE) - A transaction on the SPI port is framed by the active low CE input signal. A
transaction is a minimum of 3 SPI bursts and can extend to a greater number of bursts.
2. SPI Clock (SPICLK) - The host drives the SPICLK input to the MC13201. Data is clocked into the
master or slave on the leading (rising) edge of the return-to-zero SPICLK and data out changes
state on the trailing (falling) edge of SPICLK.
NOTE
For Freescale microcontrollers, the SPI clock format is the clock phase
control bit CPHA = 0 and the clock polarity control bit CPOL = 0.
3. Master Out/Slave In (MOSI) - Incoming data from the host is presented on the MOSI input.
4. Master In/Slave Out (MISO) - The MC13201 presents data to the master on the MISO output.
A typical interconnection to a microcontroller is shown in Figure 7.
Table 7. MC13201 Mode Definitions and Transition Times
Mode
Definition
Transition Time
To or From Idle
Off
All IC functions Off, Leakage only. RST asserted. Digital outputs are tri-stated
including IRQ
10 - 25 ms to Idle
Hibernate
Crystal Reference Oscillator Off. (SPI not functional.) IC Responds to ATTN. Data is
retained.
7 - 20 ms to Idle
Doze
Crystal Reference Oscillator On but CLKO output available only if Register 7, Bit 9 =
1 for frequencies of 1 MHz or less. (SPI not functional.) Responds to ATTN and can
be programmed to enter Idle Mode through an internal timer comparator.
(300 + 1/CLKO) µs to Idle
Idle
Crystal Reference Oscillator On with CLKO output available. SPI active.
Receive
Crystal Reference Oscillator On. Receiver On.
144 µs from Idle
Transmit
Crystal Reference Oscillator On. Transmitter On.
144 µs from Idle


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