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1 / 9 page 1/9 August 2002 STP8NM50 STP8NM50FP N-CHANNEL 500V - 0.7 Ω - 8A TO-220/TO-220FP MDmesh™Power MOSFET (*)Limited only by maximum temperature allowed n TYPICAL RDS(on) = 0.7Ω n HIGH dv/dt AND AVALANCHE CAPABILITIES n 100% AVALANCHE TESTED n LOW INPUT CAPACITANCE AND GATE CHARGE n LOW GATE INPUT RESISTANCE DESCRIPTION The MDmesh™ is a new revolutionary MOSFET technology that associates the Multiple Drain pro- cess with the Company’s PowerMESH™ horizontal layout. The resulting product has an outstanding low on-resistance, impressively high dv/dt and excellent avalanche characteristics. The adoption of the Company’s proprietary strip technique yields overall dynamic performance that is significantly better than that of similar competition’s products. APPLICATIONS The MDmesh™ family is very suitable for increasing power density of high voltage converters allowing system miniaturization and higher efficiencies. ABSOLUTE MAXIMUM RATINGS (•)Pulse width limited by safe operating area TYPE VDSS RDS(on) ID STP8NM50 STP8NM50FP 500V 500V < 0.8 Ω < 0.8 Ω 8 A 8 A Symbol Parameter Value Unit STP8NM50 STP8NM50FP VDS Drain-source Voltage (VGS = 0) 500 V VDGR Drain-gate Voltage (RGS = 20 kΩ) 500 V VGS Gate- source Voltage ±30 V ID Drain Current (continuous) at TC = 25°C 5 5 (*) A ID Drain Current (continuous) at TC = 100°C 3.1 3.1 (*) A IDM (l) Drain Current (pulsed) 20 20 (*) A PTOT Total Dissipation at TC = 25°C 120 30 W Derating Factor 0.4 W/°C dv/dt Peak Diode Recovery voltage slope 15 V/ns VISO Insulation Winthstand Voltage (DC) -- 2500 V Tstg Storage Temperature –65 to 150 °C Tj Max. Operating Junction Temperature TO-220 TO-220FP 1 2 3 1 2 3 INTERNAL SCHEMATIC DIAGRAM |
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