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STP75NF75L bảng dữ liệu(PDF) 1 Page - STMicroelectronics |
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1 / 11 page 1/11 April 2002 . STP75NF75L STB75NF75L STB75NF75L-1 N-CHANNEL 75V - 0.009 Ω - 75A D2PAK/I2PAK/TO-220 STripFET™ II POWER MOSFET s TYPICAL RDS(on) = 0.009Ω s EXCEPTIONAL dv/dt CAPABILITY s 100% AVALANCHE TESTED s LOW THRESHOLD DRIVE DESCRIPTION This MOSFET series realized with STMicroelectronics unique STripFET process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced high- efficiency, high-frequency isolated DC-DC converters for Telecom and Computer applications. It is also intended for any applications with low gate drive requirements . APPLICATIONS s SOLENOID AND RELAY DRIVERS s DC MOTOR CONTROL s DC-DC CONVERTERS s AUTOMOTIVE ENVIRONMENT TYPE VDSS RDS(on) ID STB75NF75L/-1 STP75NF75L 75 V 75 V <0.011 Ω <0.011 Ω 75 A 75 A 1 2 3 1 3 1 2 3 TO-220 D2PAK TO-263 I2PAK TO-262 ABSOLUTE MAXIMUM RATINGS ( •) Current limited by package ( ••) Pulse width limited by safe operating area. (1) ISD ≤ 75A, di/dt ≤ 500A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX. (2) Starting Tj = 25 oC, ID = 37.5A, VDD = 30V Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 75 V VDGR Drain-gate Voltage (RGS = 20 kΩ) 75 V VGS Gate- source Voltage ± 15 V ID(•) Drain Current (continuous) at TC = 25°C 75 A ID Drain Current (continuous) at TC = 100°C 70 A IDM(••) Drain Current (pulsed) 300 A Ptot Total Dissipation at TC = 25°C 300 W Derating Factor 2 W/°C dv/dt (1) Peak Diode Recovery voltage slope 20 V/ns EAS (2) Single Pulse Avalanche Energy 680 mJ Tstg Storage Temperature -55 to 175 °C Tj Max. Operating Junction Temperature INTERNAL SCHEMATIC DIAGRAM |
Số phần tương tự - STP75NF75L |
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Mô tả tương tự - STP75NF75L |
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