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STA335BWQS13TR bảng dữ liệu(PDF) 5 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  2.1-channel high-efficiency digital audio system with QSound QHD
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STA335BWQS13TR bảng dữ liệu(HTML) 5 Page - STMicroelectronics

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STA335BWQS
Contents
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7.9.6
Output mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
7.10
Tone control register (addr 0x11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
7.10.1
Tone control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
7.11
Dynamics control registers (addr 0x12 to 0x15) . . . . . . . . . . . . . . . . . . . . 50
7.11.1
Limiter 1 attack/release rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
7.11.2
Limiter 1 attack/release threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
7.11.3
Limiter 2 attack/release rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
7.11.4
Limiter 2 attack/release threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
7.12
User-defined coefficient control registers (addr 0x16 to 0x26) . . . . . . . . . 55
7.12.1
Coefficient address register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
7.12.2
Coefficient b1 data register bits 23:16 . . . . . . . . . . . . . . . . . . . . . . . . . . 55
7.12.3
Coefficient b1 data register bits 15:8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
7.12.4
Coefficient b1 data register bits 7:0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
7.12.5
Coefficient b2 data register bits 23:16 . . . . . . . . . . . . . . . . . . . . . . . . . . 55
7.12.6
Coefficient b2 data register bits 15:8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
7.12.7
Coefficient b2 data register bits 7:0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
7.12.8
Coefficient a1 data register bits 23:16 . . . . . . . . . . . . . . . . . . . . . . . . . . 56
7.12.9
Coefficient a1 data register bits 15:8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
7.12.10
Coefficient a1 data register bits 7:0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
7.12.11
Coefficient a2 data register bits 23:16 . . . . . . . . . . . . . . . . . . . . . . . . . . 56
7.12.12
Coefficient a2 data register bits 15:8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
7.12.13
Coefficient a2 data register bits 7:0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
7.12.14
Coefficient b0 data register bits 23:16 . . . . . . . . . . . . . . . . . . . . . . . . . . 57
7.12.15
Coefficient b0 data register bits 15:8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
7.12.16
Coefficient b0 data register bits 7:0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
7.12.17
Coefficient write/read control register . . . . . . . . . . . . . . . . . . . . . . . . . . 57
7.12.18
User-defined EQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
7.12.19
Pre-scale . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
7.12.20
Post-scale . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
7.12.21
Over-current post-scale . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
7.13
Variable max power correction registers (addr 0x27 to 0x28) . . . . . . . . . 62
7.14
Variable distortion compensation registers (addr 0x29 to 0x2A) . . . . . . . 62
7.15
Fault detect recovery constant registers (addr 0x2B to 0x2C) . . . . . . . . . 62
7.16
Device status register (addr 0x2D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
8
Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64


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