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STM1403
Pin descriptions
11/35
2
Pin descriptions
See Figure 1: Logic diagram and Table 2: Signal names for a brief overview of the signals
connected to this device.
2.1
SAL, security alarm output (open drain)
This signal can be generated when ANY of the following conditions occur:
VINT > VHV, where VHV = upper voltage trip limit (4.2 V typ); and where VINT = VCC or
VBAT;
VINT < VLV, where VLV = lower voltage trip limit (2.0 V typ); and where VINT = VCC or
VBAT; or
When any of the physical tamper inputs, TP1 to TP4, change from their normal states to
the opposite (i.e., intrusion of a physical enclosure).
Note:
1
The default state of the SAL output during initial power-up is undetermined.
2
The alarm function will operate either with VCC on or when the part is internally switched
from VCC to VBAT.
2.1.1
TP1, TP3
Physical tamper detect pin set normally to high (NH). They are connected externally through
a closed switch or a high-impedance resistor to VOUT (in the case of STM1403A) or VTPU (in
the case of STM1403B/C. A tamper condition will be detected when the input pin is pulled
low (see Figure 5 and Figure 6). If not used, tie the pin to VOUT (for STM1403A) or VTPU (for
STM1403B/C).
2.1.2
TP2, TP4
Physical tamper detect pin set normally to low (NL). They are connected externally through
a high-impedance resistor or a closed switch to VSS. A tamper condition will be detected
when the input pin is pulled high (see Figure 7 and Figure 8). If not used, tie the pin to VSS.
2.1.3
Vccsw, VCC switch output
This output is low when VOUT (see Section 2.1.10: VOUT on page 13) is internally switched
to VCC; in this mode it may be used to turn on an external p-channel MOSFET switch which
can source an external device directly from VCC for currents greater than 80 mA (bypassing
the STM1403).
This pin goes high when VOUT is internally switched to VBAT and may be used as a “BATT
ON” indicator.
If a security alarm (SAL) is issued on tamper, then the state of the Vccsw pin is as follows:


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