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STLC5412FN bảng dữ liệu(PDF) 6 Page - STMicroelectronics |
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STLC5412FN bảng dữ liệu(HTML) 6 Page - STMicroelectronics |
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6 / 74 page  PIN FUNCTIONS (no Specific Microwire / GCI Mode) Note: all pin number are referred to Plastic DIP28 package. Pin Name In/Out Description 1, 4 LO+, LO- Out, Out Transmit 2B1Q signal differential outputs to the line transformer. When used with an appropriate 1:1.5 step-up transformer and the proper line interface circuit the line signal conforms to the output specifications in ANSI standard with a nominal pulse amplitude of 2.5 Volts. 2, 3 LI+, LI- In, In Receive 2B1Q signal differential inputs from the line transformer. 5, 8 VCCA, VCCD In, In Positive power supply input for the analog and digital sections, which must be +5 Volts +/-5% and must be directly connected together. 24, 9 23 GNDA,GNDD1 GNDD2 In, In In Negative power supply pins, which must be connected together close to the device. All digital and analog signals are referred to these pins, which are normally at the system Ground. 10 TSR Out (LT configuration only) This pin is an open drain output normally in the high impedance state which pulls low when B1 and B2 time-slots are active. It can be used to enable the Tristate control of a backplane line-driver. SCLK Out (NT configuration only) 15.36 MHz clock output which is frequency locked to the received line signal active as soon as UID is powered up except in NT1 Auto configuration (active only if S line activation is requested) 20 XTAL2 Out The output of the crystal oscillator, which should be connected to one end of the crystal, if used. Otherwise, this pin must be left not connected. 21 XTAL1 In The master clock input, which requires either a parallel resonance crystal to be tied between this pin and XTAL2, or a logic level clock input from a stable source. This clock does not need to be synchronized to the digital interface clocks (FSa, BCLK).Crystal specifications: 15.36 MHz +/-50ppm parallel resonant; Rs ≤ 20 ohms; load with 33pF to GND each side. 28 MW In MICROWIRE selection: When set high, MICROWIRE control interface is selected. When set low, GCI interface is selected. PIN FUNCTIONS (specific Micro Wire mode) Pin Name In/Out Description 6 FSa In Out Input or Output depending of the CMS bit in CR1 register, FSa is a 8 KHz clock which indicates the start of the frame on Bx when FSa is input, or Bx and Br when FSa is output. Input or Output, the location of FSa relative to the frame on Bx or Bx and Br depends of DDM bit in CR1 register, also the selected format. 7 FSb In Out Input or Output depending of the CMS bit in CR1 register, FSb is a 8 KHz clock which indicates the start of the frame on Br when it is an input. When it is an output, FSb is a 8 KHz pulse conforming with the selected format and always indicating the second 64Kbit/sec channel of the frame on Br. Input or Output, the location of FSb relative to the frame on Br depends of DDM bit in CR1 register, also the selected format. 11 Br Out 2B+D datas tristate output. Datas received from the line are shifted out on the rising edge (at the BCLK frequency or the half BCLK frequency if format 4 is selected) during the assigned time slot. Br is in high impedance state outside the assigned time slot and during the assigned time slot of the channel if it is disabled. When D channel port is enabled, only B1 B2 are on Br. STLC5412 6/74 |
Số phần tương tự - STLC5412FN |
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Mô tả tương tự - STLC5412FN |
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