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1.1.2.2 Addressing Registers
All registers in the Register File and pages can be
specified by using a decimal, hex or binary ad-
dress, e.g. R231, RE7h or R11100111b is the
same register.
The registers can be referred to by their hexadeci-
mal group address, so that registers R0-R15 form
group 0, R160-R175 form group A and so on.
Working Register Addresses
The 8-bit register address is formed by 2 nibbles,
for example, for register R195 or RC3h or
R11000011, 1100 specifies the 13th group (i.e.
group C) and 0011 specifies the 3rd register in that
group.
Working registers are addressed by supplying the
least significant nibble in the instruction and adding
it to the most significant nibble found in the Regis-
ter Pointer (R233). Working register addressing is
shown in Figure 1-7.
System Registers
The 16 system registers at addresses R224 to
R239 form Group E.
The system registers are addressable using any of
the 4 register addressing modes and the most sig-
nificant nibble will, in all cases, be 14 (0Eh).
Paged Registers
There are a maximum of 64 pages each containing
16 registers. These are addressed using the regis-
ter addressing modes with the addition of the Page
Pointer register, R234. This register selects the
page to be addressed in group F and once set,
does not need to be changed if two or more regis-
ters on the same page are to be addressed in suc-
cession.
Therefore if the Page Pointer, R234, is set to 5, the
instructions
spp 5
ld R242, r4
will load the contents of working register r4 into the
third register (R242) of page 5.
These paged registers hold data and control regis-
ters related to the on-chip peripherals, and thus the
configuration depends upon the peripheral organi-
sation of each ST9 family member. i.e. pages only
exist if the peripheral exists.
Available pages are shown in Table 1-3.
1.1.2.3 Input/Output Ports
The Input/Output ports are located in two areas.
The port registers for Ports 0-5 are located at the
bottom of the System register group in locations
R224 to R229.
Each Port has three associated Control registers,
which determine the individual pin modes (I/O,
Open-Drain etc). These registers are located in
pages 2 and 3.
ADDRESS SPACES (Continued)
Hex.
Address
Decimal
Address
Function
Register File
Group
F0-FF
240-255
Paged
Registers
Group F
E0-EF
224-239
System
Registers
Group E
D0-DF
208-223
General
Purpose
Registers
Group D
C0-CF
192-207
Group C
B0-BF
176-191
Group B
A0-AF
160-175
Group A
90-9F
144-159
Group 9
80-8F
128-143
Group 8
70-7F
112-127
Group 7
60-6F
96-111
Group 6
50-5F
80-95
Group 5
40-4F
64-79
Group 4
30-3F
48-63
Group 3
20-2F
32-47
Group 2
10-1F
16-31
Group 1
00-0F
00-15
Group 0
Table 1-2. Register File Organization
®
ST9291
9/20


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