ST90158 datasheet(3/190 Pages) STMICROELECTRONICS

tên linh kiện	ST90158

Giải thích chi tiết về linh kiện	8/16-BIT MCU FAMILY WITH UP TO 64K ROM/OTP/EPROM AND UP TO 2K RAM

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Table of Contents

9

4.2.1

Divide by Zero trap . . . . . . . . . . . . . . . . .... . . . ... . . . . . . . . . . . . . ... .. . . .. . 48

4.2.2

Segment Paging During Interrupt Routines . .... .. . . . . . . . . . . . . . ... .. . .... 49

4.3 INTERRUPT PRIORITY LEVELS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

4.4 PRIORITY LEVEL ARBITRATION . . . . . . ... .. ... .. .. ... .. .. ... .. .. .... . . ... .. 49

4.4.1

Priority level 7 (Lowest) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

4.4.2

Maximum depth of nesting . . . . . . ... .. ... .. .. . . . . . . . . . . . . . . .... . . ... .. 49

4.4.3

Simultaneous Interrupts . . . . . . . . . . . . .... . . . ... . . . . . . . . . . . . . ... ... . . . . 49

4.4.4

Dynamic Priority Level Modification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

4.5 ARBITRATION MODES . . . . . . . . . . . . . . . . . .... . ... .. . . . . .... . . . ... . . . . . . . . . . 50

4.5.1

Concurrent Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

4.5.2

Nested Mode . . . . . . .... . ... .. . . ... ... . ... .. . . ... .. . . ... . ... .. .. ... 53

4.6 EXTERNAL INTERRUPTS . . . . . . . . . . . . . . . . . . . . . .... .... ... . . . . . . . . ... .. . . . 55

4.7 TOP LEVEL INTERRUPT . . . . . . . . . . . . . . . . . .... ... . . . . . . . . . . . . . . . . . . . . ... .. 57

4.8 ON-CHIP PERIPHERAL INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . .... . . ... .. 57

4.9 INTERRUPT RESPONSE TIME . .... . . ... .. .... ... . . . . . . . . . . . . . . . . . . . . ... .. 58

4.10 INTERRUPT REGISTERS . . .... . ... .. . . . . .... .... .. . . . . . . . . . . . . . ... .. . .... 59

5 ON-CHIP DIRECT MEMORY ACCESS (DMA) . . . . . . . ... . . . . . . . . . .... ... . . . . . . . . . . . . 63

5.1 INTRODUCTION . . . . . . . . . . . . . .... . . ... .. ... .. .. . . . . . . . ... .. .. .... . . ... .. 63

5.2 DMA PRIORITY LEVELS . . . .... . ... .. . . . . .... .... .. . .... .. . . . . . . ... .. . .... 63

5.3 DMA TRANSACTIONS . . . . . . . . . . . . . . ... .. ... .. .. ... .. .. ... .. .. .... . . ... .. 64

5.4 DMA CYCLE TIME . . . . . . . . . . . . . . . .... . ... .. .. .. . . . . . . . . . . . . ... . . . .... . ... 66

5.5 SWAP MODE . . . . . . . . . . . . .... . ... .. . . . . .... .... .. . .... .. . . . . . . ... .. . .... 66

5.6 DMA REGISTERS . . . . . . . . . . . . .... . . ... .. .... ... . . . . . . . . . . . . . . . . . . . . ... .. 67

6 RESET AND CLOCK CONTROL UNIT (RCCU) . . . .... .... .. . . . . . . . . . . . . . ... .. . .... 68

6.1 INTRODUCTION . . . . . . . . . . . . . .... . . ... .. ... .. .. . . . . . . . ... .. .. .... . . ... .. 68

6.2 CLOCK CONTROL UNIT . . . . . . . .... . . ... .. .... ... . . . . . . . . . . . . . . . . . .. . ... .. 68

6.2.1

Clock Control Unit Overview . . . . . ... .. ... .. .. . . . . . . . ... .. .. .... . . ... .. 68

6.3 CLOCK MANAGEMENT . . . . . . . . . . . . . ... . . . . ... .. ... .. .. ... .. . ... .. . . ... . . 69

6.3.1

PLL Clock Multiplier Programming . . . . .... .... .. . . . . . . . . . . . . . ... .. . .... 70

6.3.2

CPU Clock Prescaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

6.3.3

Peripheral Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

6.3.4

Low Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .... . ... 71

6.3.5

Interrupt Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . .... .... .. . . . . . . . . . . 71

6.4 CLOCK CONTROL REGISTERS . . . . . . . . . . . . . . . . . .... .... ... . . . . . . . . ... .. . . . 74

6.5 OSCILLATOR CHARACTERISTICS . . . . . . . . . . . .... . . ... . . . . ... .. ... .. .. ... .. 77

6.6 RESET/STOP MANAGER . . . . . . .... . . ... .. .... ... . . . . . . . . . . . . . . . . . .. . ... .. 79

6.6.1

RESET Pin Timing . . . . . . . . . . . . . . . . .... . . . ... . . . . . . . . . . . . . ... ... . . . . 80

6.7 EXTERNAL STOP MODE . . .... . ... .. . . . . .... .... .. . .... .. . . . . . . ... .. . .... 80

7 EXTERNAL MEMORY INTERFACE (EXTMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

7.1 INTRODUCTION . . . . . . . . . . . . . .... . . ... .. ... .. .. . . . . . . . ... .. .. .... . . ... .. 81

7.2 EXTERNAL MEMORY SIGNALS . . . . . . . . . . . . . . . . . .... . . . .... .... .. . .... .. . . . 82

7.2.1

AS: Address Strobe . . . . . . . . . . . . . . . . . . . . . .... . . . . ... . ... .. . . ... .. . . . 82

7.2.2

DS: Data Strobe . . . . .... . ... .. . . . . .... .... .. . .... .. . . . . . . ... .. . .... 82

7.2.3

DS2: Data Strobe 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

7.2.4

RW: Read/Write . . . . .... . ... .. . . . . . ... . ... .. . . ... .. . .... . ... .. . . ... 85

7.2.5

BREQ, BACK: Bus Request, Bus Acknowledge . . . . . . . . . . . . . . . . . . . .... . ... 85

7.2.6

PORT 0 . . . . . . .... . . . . .. . . . . . . . . . . . . . ... ... . . . . . . . . . . ... .. .. . . . . . . 86

Số phần tương tự - ST90158

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
SEMTECH ELECTRONICS LTD...	ST9015	147Kb / 2P	PNP Silicon Epitaxial Planar Transistor
Rectron Semiconductor	ST9015	631Kb / 5P	TRANSISTOR (PNP)

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