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7 / 109 page ST7263 7/109 PIN DESCRIPTION (Cont’d) RESET (see Note 1): Bidirectional. This active low signal forces the initialization of the MCU. This event is the top priority non maskable interrupt. This pin is switched low when the Watchdog has triggered or VDD is low. It can be used to reset ex- ternal peripherals. OSCIN/OSCOUT: Input/Output Oscillator pin. These pins connect a parallel-resonant crystal, or an external source to the on-chip oscillator. VPP/TEST: EPROM programming input. This pin must be held low during normal operating modes. VDD/VSS (see Note 2): Main power supply and Ground voltages. VDDA/VSSA (see Note 2): Power Supply and Ground for analog peripherals. Alternate Functions: Several pins of the I/O ports assume software programmable alternate func- tions as shown in the pin description. Note 1: Adding two 100nF decoupling capacitors on Reset pin (respectively connected to VDD and VSS) will significantly improve product electromag- netic susceptibility performances. Note 2: To enhance reliability of operation, it is recommended to connect VDDA and VDD together on the application board. The same recommenda- tions apply to VSSA and VSS. Table 2. Device Pin Description Pin n° Pin Name Level Port / Control Main Function (after reset) Alternate Function Input Output 11 VDD S Power supply voltage (4V - 5.5V) 2 2 OSCOUT O Oscillator output 3 3 OSCIN I Oscillator input 44 VSS S Digital ground 5 5 PC2/USBOE I/O CT X X Port C2 USB Output Enable 6 6 PC1/TDO I/O CT X X Port C1 SCI transmit data output *) 7 7 PC0/RDI I/O CT X X Port C0 SCI Receive Data Input *) 8 8 RESET I/O X X Reset -- 9 NC -- Not connected 9 10 PB7/AIN7/IT8 I/O CT 10mA X XX X Port B7 ADC analog input 7 10 11 PB6/AIN6/IT7 I/O CT 10mA X XX X Port B6 ADC analog input 6 11 12 VPP/TEST S Supply for EPROM and test input 12 13 PB5/AIN5/IT6 I/O CT 10mA X XX X Port B5 ADC analog input 5 13 14 PB4/AIN4/IT5 I/O CT 10mA X XX X Port B4 ADC analog input 4 14 15 PB3/AIN3 I/O CT 10mA X XX Port B3 ADC analog input 3 15 16 PB2/AIN2 I/O CT 10mA X XX Port B2 ADC analog input 2 16 17 PB1/AIN1 I/O CT 10mA X XX Port B1 ADC analog input 1 17 18 PB0/AIN0 I/O CT 10mA X XX Port B0 ADC Analog Input 0 18 19 PA7/OCMP2/IT4 I/O CT X XX Port A7 Timer Output Compare 2 19 20 PA6/OCMP1/IT3 I/O CT X XX Port A6 Timer Output Compare 1 |
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